Outer-Product Matrix Multiplication for Floating-Point Unit Efficiency
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Solution Overview
Problem
Current floating-point units experience decreased efficiency due to underutilization of hardware resources, particularly when performing parallel operations with small floating-point data types like 16-bit and 8-bit formats, which are commonly used in artificial neural networks.
Innovation Solution
The proposed solution involves an outer-product-based matrix multiplication method that divides floating-point data into upper and lower bits, allowing for shift and addition operations across suboperation units, effectively utilizing underutilized hardware resources by treating multiple small operators as a single large operator, thereby enhancing resource sharing and parallel operation performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a conventional floating-point unit structure is used, then it can perform basic floating-point operations, but resource utilization is low and parallel operation capability is limited
Solution Approach 1:
The patent merges multiple small floating-point operators (FP8, FP16) into a single unified floating-point unit structure. By combining multiple operators that handle different precision formats into one integrated unit, the system achieves better resource utilization and enables parallel operations across multiple data types simultaneously, resolving the contradiction between productivity and device complexity
Solution Approach 2:
The floating-point unit is designed with multi-functionality to handle various floating-point data types (FP8, FP16, and potentially other formats) within a single unified structure. This universal design allows the same hardware resource to perform multiple operations on different data types in parallel, improving resource utilization while maintaining operational efficiency
2Speed
If small floating-point data types (FP8, FP16) are used for neural network operations, then computational speed increases, but hardware resource utilization decreases
Solution Approach 1:
The patent segments the floating-point unit into multiple specialized operators within a unified structure, where each operator is optimized for specific data types (FP8, FP16). This segmentation allows each operator to work independently on its designated data type at high speed, while the unified structure ensures all operators are fully utilized in parallel, resolving the contradiction between speed and resource utilization
Data Source
AI summary
Disclosed herein is a method for outer-product-based matrix multiplication for a floating-point data type includes receiving first floating-point data and second floating-point data and performing matrix multiplication on the first floating-point data and the second floating-point data, and the result value of the matrix multiplication is calculated based on the suboperation result values of floating-point units.