Outer Spacer Structure Prevents Etchant Overflow in DRAM Contact Formation
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Solution Overview
Problem
The existing methods for forming contact plugs in DRAM devices result in undesired interlayer loss and penetration issues due to the etchant flowing from the cell region to the peripheral region during the buffered oxide etch process, which can damage vulnerable devices.
Innovation Solution
A novel method involving the formation of an outer spacer structure around the cell region to prevent etchant overflow, using a first mask layer with mandrels and a peripheral portion, followed by the creation of spacers and a second mask layer to define trenches, which are then filled with insulating material to form loop-shaped insulating patterns that act as a dike to prevent etchant penetration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a buffered oxide etch process is performed to open the oxide layer between bit lines and word lines, then contact holes are defined for forming contact plugs, but the etchant flows over and etches the interlayer on the peripheral region causing undesired interlayer loss and penetration issues
Solution Approach 1:
The device structure is segmented into a cell region and a peripheral region, with the etch process selectively applied to the cell region. The outer spacer structure acts as a boundary that segments the etchant's path, allowing precise contact hole formation in the cell region while protecting the peripheral region from etchant damage.
Solution Approach 2:
The outer spacer structure serves as an intermediary element between the cell region and the peripheral region. It physically blocks the etchant from reaching the peripheral interlayer, mediating the interaction between the etching process and the device structure to prevent harmful effects while maintaining necessary functionality.
2Productivity
If the etchant is allowed to flow freely during the etch process, then the etching process is simple and fast, but interlayer loss and penetration issues occur in the peripheral region impacting vulnerable devices
Solution Approach 1:
The outer spacer structure is formed in advance before the etching process, creating a protective barrier that prevents etchant overflow. This preliminary structural preparation ensures that when the etching process is performed, the peripheral region is already protected, maintaining both process efficiency and device reliability.
Solution Approach 2:
The outer spacer structure provides preliminary anti-action by counteracting the harmful effect of etchant flow before it can damage the peripheral region. The spacer's physical presence preemptively blocks the etchant's path, preventing interlayer loss and penetration issues before they occur.
Data Source
AI summary
A method of forming insulating structures in a semiconductor device is provided in the present invention, which includes the steps of forming a first mask layer with mandrels and a peripheral portion surrounding the mandrels, forming spacers on sidewalls of first mask layer, filling up the space between spacers with a second mask layer, removing the spacers to form opening patterns, performing an etch process with the first mask layer and the second mask layer as an etch mask to form trenches in the substrate, and filling up the trenches with an insulating material to form insulating structures.