Output Amplifier Bias Synchronization for Uniform Display Driving
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Solution Overview
Problem
Display unevenness occurs due to timing differences in bias voltage changes between the central and end units of a semiconductor IC chip in display drivers, especially when manufacturing variations cause characteristic variations among output amplifiers, leading to display issues.
Innovation Solution
An output amplifier circuit with independent bias circuits for amplifier groups, connected by switch circuits that synchronize bias voltages across groups, ensuring uniformity and reducing timing differences.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single bias circuit is used for all output amplifiers, then device complexity is reduced, but timing differences in bias voltage changes occur between central and end units causing display unevenness
Solution Approach 1:
The patent divides the output amplifiers into multiple groups (first group and second group) and assigns a separate bias circuit to each group. This segmentation allows independent bias voltage control for each group, eliminating timing differences in bias voltage changes between central and end units, thereby preventing display unevenness while maintaining reasonable device complexity.
2Manufacturing precision
If multiple independent bias circuits are provided for amplifier groups, then timing differences in bias voltage changes are reduced, but device complexity increases
Solution Approach 1:
The patent merges the bias voltage generation function across multiple bias circuits by making them substantially identical in configuration. This allows each group to receive properly timed bias voltages while maintaining consistency in bias characteristics, achieving display uniformity without excessive complexity increase.
Solution Approach 2:
The patent creates multiple copies of the same bias circuit design for different amplifier groups. Each bias circuit is a copy of the others, ensuring consistent performance characteristics while allowing independent timing control for each group, thus achieving display uniformity with manageable complexity.
3Speed
If operating current is increased in differential stages, then slew rate is improved, but power consumption increases
Solution Approach 1:
The patent dynamically adjusts the operating current of the differential stage using a bias voltage that varies over time. The bias voltage is set to a first value during a first period and a second value during a second period, allowing the operating current to be increased only when high slew rate is needed, thereby improving speed while reducing overall power consumption.
Solution Approach 2:
The patent applies periodic action by alternating the bias voltage between two different values during different periods. This periodic modulation of the operating current allows the amplifier to achieve high slew rate during critical periods while consuming less power during non-critical periods, resolving the contradiction between speed and power consumption.
Data Source
AI summary
An output amplifier circuit, and a display driver and a display device including the output amplifier circuit.The output amplifier circuit includes: first to nth amplifiers which receive first to nth input voltages and generate first to nth output voltages by amplifying the respective first to nth input voltages; first to Kth bias circuits which are provided corresponding to each of first to Kth amplifier groups formed by grouping the first to nth amplifiers into K groups, and each generates a bias voltage for setting a current value of an operating current of the amplifiers; first to Kth wirings which supply the bias voltage generated by each of the first to Kth bias circuits to the first to Kth amplifier groups respectively; and a switch circuit which, when in an ON state, connects one wiring among the first to Kth wirings with another wiring different from the one wiring.


