Output Buffer Clamp Control for Voltage Overshoot Suppression

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Solution Overview

Problem

In display drivers, operational amplifiers experience voltage overshoot due to incomplete closure of clamping circuits during full swing outputs, leading to leakage currents that alter systematic offset voltages, particularly problematic in low power applications where current paths are already weakened.

Innovation Solution

An output buffer circuit with a control unit that activates and deactivates a clamping circuit based on input voltage and output voltage stability, ensuring complete closure of transistors to prevent voltage overshoot and maintain steady-state conditions without increasing current consumption or area costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a clamping circuit is added to avoid voltage overshoot, then voltage overshoot is prevented, but leakage currents occur that change systematic offset voltage

Engineering Contradiction:
Improvevoltage overshoot preventionVSAvoidsystematic offset voltage stability
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The clamping circuit is designed with dynamic control where transistors POS2 and NOS2 are turned on/off based on output voltage levels. During transient states, the clamping circuit is active to prevent overshoot; during steady-state, it is deactivated to eliminate leakage currents, making the circuit behavior adaptive rather than static

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The control unit activates the clamping circuit in advance during transient states before overshoot can occur, and deactivates it when steady-state is reached, proactively managing the trade-off between overshoot prevention and leakage current elimination

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If the clamping circuit is kept closed to prevent leakage currents, then systematic offset voltage stability is improved, but voltage overshoot cannot be prevented during transient states

Engineering Contradiction:
Improvesystematic offset voltage stabilityVSAvoidvoltage overshoot prevention
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The clamping circuit transitions from a static always-closed design to a dynamic design where transistors POS2 and NOS2 are controlled by voltage levels. The circuit automatically adjusts its state based on whether the output is in transient or steady-state, optimizing both overshoot prevention and offset voltage stability

Inventive Principle:
Principle #15Dynamics

3Productivity

If the operational amplifier rapidly charges and discharges the load end, then driving capability is enhanced, but voltage overshoot occurs due to incomplete current recovery

Engineering Contradiction:
Improvedriving capabilityVSAvoidvoltage overshoot
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The clamping circuit with transistors POS2 and NOS2 is positioned to counteract voltage overshoot before it fully develops. By activating the clamping action during transient states, the circuit preemptively prevents the harmful voltage excursion while maintaining the rapid charging/discharging capability

Inventive Principle:
Principle #9Preliminary anti-action

Data Source

PatentUSRE47743E1Output buffer circuit and method for avoiding voltage overshoot
Publication Date: 2019.11.26 NOVATEK MICROELECTRONICS CORP
  • USRE47743E1 patent drawing
  • USRE47743E1 patent drawing
  • USRE47743E1 patent drawing

AI summary

An output buffer circuit for avoiding voltage overshoot includes an input stage, an output bias circuit, an output stage, a clamp circuit, and a control unit. The input stage includes a positive input terminal, for receiving an input voltage, and a negative input terminal. The input stage generates a current signal according to the input voltage. The output bias circuit is coupled to the input stage, for generating a dynamic bias according to the current signal. The output stage is coupled to the input stage and the output bias circuit, including an output terminal, reversely coupled to the positive input terminal, and at least one output transistor, coupled to the output bias circuit and the output terminal, for providing a driving current to the output terminal according to the dynamic bias to generate an output voltage.