Output Buffer Gate Control for Low-EMI Display Driving
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Solution Overview
Problem
Existing output buffer circuits for driving loads in display panels face challenges in reducing power consumption and circuit area while minimizing electromagnetic interference (EMI) and maintaining high-speed load drive capabilities.
Innovation Solution
The proposed output buffer circuit includes a bias part generating a bias current and a buffer part that generates a mirror current of the bias current. The buffer part consists of transistors and an output control part that adjusts the gate voltage of transistors based on the current value of the mirror current, preventing simultaneous ON states of the transistors and reducing through current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If high-drive output buffer is used to drive GIP and multiplexer, then load drive capability is improved, but through current increases and EMI occurs
Solution Approach 1:
The patent applies preliminary action by introducing a pre-buffer stage before the main buffer transistors. This pre-buffer stage prepares the gate voltages in advance to ensure that when the main buffer transistors switch, they do not overlap in the ON state. The pre-buffer circuit generates intermediate control signals that control the timing of the main buffer transistor switching, thereby preventing through current before it can occur.
2Object-generated harmful factors
If current source current is decreased to suppress through current, then EMI is reduced, but current drive capability decreases and pulse waveform becomes blunt
Solution Approach 1:
The patent segments the buffer circuit into multiple stages: a pre-buffer stage and a main buffer stage with separate P-channel and N-channel transistor circuits. Each stage has its own current sources and control mechanisms. This segmentation allows independent optimization of each stage - the pre-buffer stage controls switching timing to prevent through current, while the main buffer stage maintains high drive capability with separate current sources for P and N transistors.
Solution Approach 2:
The patent applies dynamics by making the current source values adjustable and time-dependent. The current sources in the pre-buffer and main buffer stages can dynamically adjust their current values based on operating conditions. This dynamic adjustment allows the circuit to maintain high drive capability when needed while suppressing through current during switching transitions, resolving the contradiction between EMI reduction and drive capability.
3Object-generated harmful factors
If pre-buffer part with current sources is added to control transistor switching timing, then through current is suppressed, but circuit area increases
Solution Approach 1:
The patent merges the pre-buffer functionality with the main buffer structure by using a shared control mechanism. The pre-buffer stage and main buffer stage are integrated such that the pre-buffer control signals directly influence the main buffer transistor gating. This merging reduces the need for completely separate control circuits, thereby reducing the overall circuit area while still achieving through current suppression.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively suppresses EMI, reduces power consumption, and minimizes circuit area while maintaining high-speed load drive capabilities by controlling the current values of the bias current and adjusting the gate voltage of transistors accordingly.
Implementation Method 1
a buffer part, generating a mirror current of the bias current
Implementation Method 2
a first transistor of a first conductivity type, supplying a first power voltage to the output terminal in a case of becoming an ON state in accordance with a voltage of the input signal received by a gate of the first transistor
Data Source
AI summary
The disclosure includes: a first transistor, supplying a first power voltage to the output terminal when becoming ON according to a voltage of the input signal received by a gate; a second transistor, supplying a second power voltage to the output terminal in a case of becoming ON in accordance with the voltage of the input signal received by a gate; and an output control part, transitioning to ON by changing a voltage of the gate of the transistor in OFF between the first and second transistors at a change speed based on a current value of a bias current generated by a bias part when the voltage of the input signal changes. According to a voltage change of the input signal, the bias part sets a bias current value to a first value throughout a predetermined period, and switches to a second, lower value in other periods.