Output Driver Buffer Circuit With Capacitive Gate Noise Isolation
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Solution Overview
Problem
Existing output driver circuits face challenges in buffering reference voltages effectively without excessive current consumption and large chip area requirements, as noise disturbances affect the control of drive transistors and require additional layout for noise reduction measures.
Innovation Solution
The proposed solution involves an output driver buffer circuit using capacitors to buffer reference voltages, which are connected to the transistor gates to turn the transistors on and off, independent of the output pad voltage, with switches controlling the connection of reference voltages and capacitors to minimize noise and current consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If buffers are used to buffer reference voltages to reduce noise effects, then noise reduction is improved, but current consumption increases significantly
Solution Approach 1:
The patent applies periodic action by using buffers only during specific time windows when noise is present (during and immediately after driver transistor switching). The control logic enables buffers periodically based on detected noise conditions, rather than maintaining them continuously. This reduces current consumption while still providing noise reduction when needed.
Solution Approach 2:
The patent implements dynamics by making the buffer operation dynamic and adaptive to actual noise conditions. The control logic dynamically adjusts buffer enablement based on real-time detection of driver transistor switching events and associated noise generation, transitioning from static continuous operation to dynamic conditional operation.
2Use of energy by moving object
If switches and delay elements are added to reduce buffer current consumption, then current consumption is reduced, but chip area increases significantly
Solution Approach 1:
The patent applies universality by designing control logic that performs multiple functions: detecting driver transistor switching events, determining noise conditions, timing buffer enablement windows, and controlling buffer operation. This multi-functional approach eliminates the need for separate switches and delay elements, reducing chip area while achieving the same current consumption reduction.
Solution Approach 2:
The patent merges the functions of switches, delay elements, control logic, and buffer management into an integrated control mechanism. By combining these previously separate components into a unified control system, the patent reduces overall chip area while maintaining the ability to reduce buffer current consumption through selective operation.
3Device complexity
If global reference voltages are used for multiple output drivers, then circuit complexity is reduced, but noise from switching drivers disturbs the reference voltages
Solution Approach 1:
The patent applies segmentation by dividing the global reference voltage distribution into isolated buffer-controlled segments. Each buffer creates an isolated voltage domain that protects the global reference from noise while still providing reference voltage to multiple drivers. This segmented approach maintains the benefits of global distribution while adding local noise isolation.
Solution Approach 2:
The patent uses buffers as intermediary elements between the global reference voltage source and the driver transistor gates. These intermediary buffers absorb and isolate noise from switching drivers, preventing it from propagating back to the global reference voltage source while still delivering stable reference voltages to multiple drivers.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces current consumption and chip area while effectively buffering noise, allowing for precise control of output driver transistors with minimal impact on power and layout, achieving efficient noise filtering and reduced propagation delays.
Implementation Method 1
a capacitor adapted to be connected to the transistor gate and further adapted when charged and connected to the gate to turn the transistor on
Data Source
AI summary
In one embodiment, an output driver buffer circuit for a logic device includes an output driver transistor adapted to adjust an output voltage of an output pad; a capacitor adapted to be connected to the transistor gate and further adapted when charged and connected to the gate to turn the transistor on; and a reference voltage source adapted to be connected to the transistor gate and further adapted when connected to the gate to maintain the transistor on. The reference voltage source is further adapted to be connected to the transistor gate after the capacitor has turned the transistor on and independent of the level of the output voltage of the output pad.