Memory Control Output Buffer Power Gating With Idle Pull-Up
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Solution Overview
Problem
Semiconductor integrated circuits face deterioration of transistor characteristics over time, leading to high impedance states at output terminals, which can result in erroneous signal outputs due to noise and decreased signal reception margins, especially at higher operating frequencies.
Innovation Solution
A semiconductor integrated circuit configuration that includes an output buffer, power supply control circuit, pull-up control circuit, and control signal generating circuit to manage power supply and pull-up operations based on specific control signals, preventing the output terminal from entering a high impedance state by controlling the enable signals and ensuring proper voltage supply during output and idle periods.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the output terminal is set to a high impedance state during idle periods to save power, then power consumption is reduced, but the terminal may assume erroneous voltage levels due to noise
Solution Approach 1:
The patent implements periodic switching between conductive and high impedance states based on output activity. During active output periods, the output buffer is enabled; during idle periods, it enters high impedance state. This periodic action reduces power consumption while maintaining signal integrity through proper state management.
Solution Approach 2:
The patent introduces a pull-up circuit as an intermediary element that actively maintains the output terminal at a predetermined voltage level during idle periods. This mediator prevents the terminal from floating to erroneous voltage levels due to noise, ensuring reliability while allowing the main output buffer to enter low-power state.
2Reliability
If the output buffer is constantly supplied with power to maintain signal integrity, then signal reception margin is maintained, but power consumption increases
Solution Approach 1:
The patent dynamically adjusts the power supply state of the output buffer based on operational requirements. The power supply control circuit switches between supplying and stopping power supply according to whether the output is active or idle, creating a dynamic power management system that balances reliability and energy efficiency.
Solution Approach 2:
The patent prepares the pull-up circuit in advance to take over maintaining the output terminal voltage when the output buffer enters idle state. This preliminary arrangement ensures that signal integrity is maintained from the moment the buffer switches to high impedance, without requiring constant power supply to the buffer.
3Stability of the object's composition
If pull-up transistors are constantly in conductive state to prevent high impedance, then output terminal stability is maintained, but transistor characteristic deterioration increases
Solution Approach 1:
The patent implements periodic switching of the pull-up transistors between conductive and non-conductive states based on output activity. During active periods, pull-up is enabled; during idle periods, pull-up transistors are switched off. This periodic action reduces transistor stress and prevents characteristic deterioration while maintaining output stability when needed.
Data Source
AI summary
A semiconductor integrated circuit includes a buffer which outputs a memory control signal to a terminal coupled to a memory device, a power supply control circuit which controls a supply of a power supply voltage from a power supply line to the buffer based on a power control signal, a pull-up control circuit configured to control a pull-up of the terminal based on a pull-up control signal, and a control signal generating circuit. The control signal generating circuit generates, during an output period, the power control signal to supply the power supply voltage to the buffer, and the pull-up control signal to stop the pull-up of the terminal, and generates, during an idle period, the power control signal to stop the supply of the power supply voltage to the buffer, and the pull-up control signal to perform the pull-up of the terminal.