Output Buffer Offset Calibration Using DDA Compensation Current

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Solution Overview

Problem

Existing display technologies face challenges in maintaining uniformity due to output buffer offset, which is caused by transistor mismatches leading to inconsistent light output from individual light emitting elements.

Innovation Solution

An apparatus and method for offset calibration using a DAC embedded amplifier, an offset calibration signal generator, and an offset calibration current generator with a differential difference amplifier (DDA) to generate and apply an offset compensation current based on a bit string signal, adjusting and unifying the polarity of offset voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If auto zeroing method is used for offset calibration, then offset compensation is achieved, but optimization is insufficient and display uniformity is not fully improved

Engineering Contradiction:
Improveoffset calibration precisionVSAvoiddisplay uniformity
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent introduces a differential difference amplifier (DDA) as an intermediary component between the output buffer and the calibration system. The DDA receives the output buffer signal and generates a differential signal that is then processed by the offset calibration signal generator. This intermediary structure enables more precise measurement and compensation of offset voltage by creating a differential measurement path that enhances sensitivity to offset errors while rejecting common-mode signals.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces traditional offset calibration mechanisms with a signal-processing-based approach. Instead of using conventional auto-zeroing circuitry, the invention uses a digital-to-analog converter (DAC) embedded amplifier combined with a DDA to generate calibration signals. The offset calibration signal generator processes digital bit string signals and converts them to analog calibration signals, substituting mechanical or analog calibration methods with a hybrid digital-analog system that offers better precision and controllability.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Manufacturing precision

If transistor mismatch is present in output buffer, then offset voltage occurs, but display uniformity deteriorates

Engineering Contradiction:
Improvetransistor matchingVSAvoiddisplay uniformity
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent implements preliminary anti-action by proactively compensating for offset voltage before it affects display uniformity. The offset calibration current generator continuously generates compensation current based on the detected offset voltage, and this compensation is applied in real-time to counteract the effect of transistor mismatch. The system performs preliminary calibration during manufacturing and continues to provide ongoing compensation, preventing uniformity deterioration rather than merely reacting to it.

Inventive Principle:
Principle #9Preliminary anti-action

Solution Approach 2:

The patent establishes a feedback loop where the output buffer signal is fed into the DDA, which generates a differential signal that reflects the offset voltage. This differential signal is then processed by the offset calibration signal generator to produce compensation current. The feedback mechanism continuously monitors the offset condition and adjusts the compensation accordingly, creating a closed-loop system that maintains display uniformity despite transistor mismatch variations.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20250219589A1Apparatus and method for offset calibration
Publication Date: 2025.07.03 IND UNIV COOP FOUND HANYANG UNIV ERICA CAMPUS
  • US20250219589A1 patent drawing
  • US20250219589A1 patent drawing
  • US20250219589A1 patent drawing

AI summary

An apparatus for offset calibration according to an embodiment of the present invention relates to an apparatus to compensate an offset voltage occurring in an output buffer, the apparatus for offset calibration comprises a DAC embedded amplifier that includes the output buffer, an offset calibration signal generator configured to receive a bit string signal from the outside and generate an offset calibration signal based on the bit string signal; and an offset calibration current generator which comprises a differential difference amplifier (DDA) and is configured to generate an offset calibration current compensating for the offset voltage based on the offset calibration signal.