Output Buffer Impedance Calibration with Segmented Resistance Adjusters

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Solution Overview

Problem

Existing impedance adjusting methods for semiconductor devices are limited by errors in impedance matching due to variations in transistor channel width and require increased circuit area for error compensation, making it difficult to accurately adjust impedance to match external resistors across varying PVT conditions.

Innovation Solution

A semiconductor device with an impedance adjuster that generates an internal reference resistance matching the external resistor, using code signals to adjust the resistance values of output buffers through a combination of MOS transistors and resistive elements, allowing precise impedance matching with reduced error and circuit area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If on/off control of a plurality of transistors is used to adjust impedance, then the impedance can be adjusted to integral multiples of external resistor value, but variations in transistor channel width cause errors in impedance adjustment

Engineering Contradiction:
Improveimpedance adjustment capabilityVSAvoidimpedance matching accuracy
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The resistance adjuster is divided into multiple resistance elements connected in series, each with a different resistance value. By selectively connecting these segmented resistance elements, the circuit can achieve fine-grained impedance adjustment without relying on transistor on/off control, thereby avoiding channel width variation errors while maintaining adjustment versatility.

Inventive Principle:
Principle #1Segmentation

2Measurement precision

If a compensation unit is added to compensate quantizing error, then resistance mismatch between pull-up and pull-down devices is reduced, but circuit area increases

Engineering Contradiction:
Improveresistance mismatch compensationVSAvoidcircuit area
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The impedance adjustment function and resistance matching function are merged into a single resistance adjuster structure. The same set of resistance elements serves both to adjust the output buffer impedance and to match the external resistor value, eliminating the need for separate compensation units and reducing overall circuit area.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The resistance adjuster is designed as a multi-functional component that simultaneously performs impedance adjustment for the output buffer and provides resistance matching for the external resistor. This universal component replaces what would traditionally require separate compensation circuits, thereby reducing circuit area while maintaining precision.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Adaptability or versatility

If multiple external resistors are used to adjust different resistance values, then various impedance values can be achieved, but device complexity and area increase

Engineering Contradiction:
Improveresistance value adjustment rangeVSAvoidcircuit configuration complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The resistance adjuster employs dynamic switching mechanisms to connect different resistance elements in series, allowing the circuit to achieve multiple resistance values without requiring multiple physical external resistors. This dynamic reconfiguration enables a single adjustable component to replace what would traditionally require multiple fixed resistors, reducing device complexity.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS7863927B2Semiconductor device
Publication Date: 2011.01.04 RENESAS ELECTRONICS CORP
  • US7863927B2 patent drawing
  • US7863927B2 patent drawing
  • US7863927B2 patent drawing

AI summary

The present invention is directed to adjust a resistance value of an output buffer on the basis of a resistance value of an external resistor. A potential according to a resistance ratio between an external resistor and each of resistance adjusters is detected by a code generator. In the code generator, code signals for adjusting resistance are adjusted in accordance with the detection result. The resistance value of each of the resistance adjusters is adjusted to an external resistor. Further, by code signals with which the resistance value of each of the resistance adjusters is adjusted to the resistance value of the external resistor, the resistance of the resistance value of an output buffer is adjusted.