Output Buffer Circuit With Variable Resistors for Rise-Fall Timing

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Solution Overview

Problem

Existing output buffer circuits require complex and multiple adjustments to set the rise and fall times of output signals due to their dependence on the drive capability of preceding stages, making it difficult to achieve desired output characteristics.

Innovation Solution

An output buffer circuit with P-type and N-type transistors and variable resistor circuits that adjust resistance values based on control signals, allowing independent control of rise and fall times without altering the drive capabilities of preceding stages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the output characteristic is adjusted by changing the drive capability of the circuit in the preceding stage, then the output characteristics such as rise time and fall time can be adjusted, but complex and multiple adjustments are required

Engineering Contradiction:
Improveoutput characteristics adjustment precisionVSAvoidadjustment complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent introduces variable resistor circuits that can independently adjust resistance values to control rise time and fall time. By changing the resistance parameter in the output buffer circuit rather than adjusting the drive capability of the preceding stage, the system achieves precise output characteristic control with simpler, more direct adjustment mechanisms.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent divides the output buffer circuit into separate variable resistor circuits for controlling rise time and fall time independently. This segmentation allows each parameter to be adjusted separately without affecting the other, eliminating the need for complex multiple adjustments of the preceding stage drive capability.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If multiple MOSFET circuits are arranged in parallel with selective high impedance, then output characteristics can be adjusted, but the output characteristic is influenced by the output waveform of the preceding stage circuit

Engineering Contradiction:
Improveoutput characteristic adjustabilityVSAvoidoutput characteristic stability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent introduces variable resistor circuits as intermediary elements between the MOSFET circuits and the output node. These resistors act as mediators that decouple the output characteristics from the preceding stage's output waveform, allowing independent control of rise and fall times while maintaining stability regardless of preceding stage variations.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Speed

If the drive capability of the preceding stage is adjusted to control output characteristics, then rise time and fall time can be optimized, but through-current increases

Engineering Contradiction:
Improverise time and fall timeVSAvoidthrough-current
Core Design Contradiction:
SpeedVSLoss of energy

Solution Approach 1:

The patent changes the control parameter from drive capability to resistance value in the output buffer circuit. By adjusting the resistance of variable resistors rather than increasing the drive capability of the preceding stage, the system achieves fast rise and fall times without the side effect of increased through-current and energy loss.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10530359B2Output buffer circuit, oscillator, electronic apparatus, and vehicle
Publication Date: 2020.01.07 SEIKO EPSON CORP
  • US10530359B2 patent drawing
  • US10530359B2 patent drawing
  • US10530359B2 patent drawing

AI summary

An output buffer circuit includes an output node, a P-type transistor, an N-type transistor, and a first variable resistor circuit provided in a signal path between a drain of one of the P-type transistor and the N-type transistor and the output node.