Output Buffer Slew Rate Compensation for Low-Power Display Drivers

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Solution Overview

Problem

Current display driver ICs face challenges in achieving high slew rates and rapid charging of display panels while maintaining low power consumption, especially for high-resolution liquid crystal display devices.

Innovation Solution

The proposed output buffer and source driver incorporate a differential amplification stage, current mirrors, and a slew rate compensation circuit to increase the slew rate of output signal voltage without increasing current consumption, utilizing transistors and capacitors to optimize signal amplification and compensation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If current display driver ICs are used to achieve high slew rates and rapid charging of display panels, then the charging speed and slew rate are improved, but the power consumption increases

Engineering Contradiction:
Improveslew rateVSAvoidcurrent consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The output buffer is divided into multiple independent amplifier stages (first amplifier, second amplifier, third amplifier) with distinct functions. Each amplifier handles specific aspects of signal processing, allowing the circuit to achieve high slew rates through coordinated operation rather than relying on a single high-current stage, thus reducing overall power consumption.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The circuit employs dynamic current steering through the slew rate compensation circuit that selectively activates current paths based on the differential input signal state. The compensation current is dynamically adjusted to provide additional drive capability only when needed for voltage transitions, rather than continuously consuming high current, enabling high slew rates during transitions while maintaining lower average power consumption.

Inventive Principle:
Principle #15Dynamics

2Loss of time

If the slew rate compensation circuit is activated to increase the slew rate of output signal voltage, then the transition time is reduced, but the current consumption increases

Engineering Contradiction:
Improvetransition timeVSAvoidcurrent consumption
Core Design Contradiction:
Loss of timeVSUse of energy by moving object

Solution Approach 1:

The slew rate compensation circuit operates periodically during voltage transitions rather than continuously. The compensation current is activated only when the output voltage needs to transition (detected through differential comparison), providing rapid charging/discharging capability during these brief periods, then remains inactive during stable states, thus achieving fast transitions without continuous high current consumption.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The circuit dynamically changes the current parameter based on operating conditions. The slew rate compensation circuit modifies the current flowing through the output stage only when voltage transitions are detected, changing from a low-current standby state to a high-current active state temporarily, then returning to low-current state, thereby achieving fast transitions without sustained high power consumption.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11538432B2Output buffer increasing slew rate of output signal voltage without increasing current consumption
Publication Date: 2022.12.27 DB GLOBALCHIP CO LTD
  • US11538432B2 patent drawing
  • US11538432B2 patent drawing
  • US11538432B2 patent drawing

AI summary

An input stage configured to differentially amplify an input signal and an output signal, a first current mirror and a second current mirror configured to receive a differential current from the input stage, an output stage including first and second output transistors, respectively including a gate connected to the first and second current mirrors, and a slew rate compensation circuit configured to (i) mirror a comparison current generated by comparing a voltage of a first input signal with a voltage of a second input signal, and (ii) provide the mirrored comparison current to the gate of the first or second output transistor.