Output Buffer High-Z Initialization During Soft Reset
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Solution Overview
Problem
Conventional semiconductor memory devices face issues with data integrity during soft reset operations, where concurrent read and write operations under abnormal conditions lead to data discrepancies due to the retention of output data by the output circuit.
Innovation Solution
An output circuit with an initialization signal generator, clock buffer, and output buffer that initializes the output node to a higher impedance state in response to specific signals during abnormal conditions, ensuring data integrity by transitioning the output node to a high-Z state.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the semiconductor memory device performs a read operation concurrently with a soft reset, then the output circuit may retain data after the soft reset, but this leads to data integrity issues and garbage data
Solution Approach 1:
The output buffer is initialized to a high-impedance state before the soft reset operation begins, preventing any potential data retention issues during the reset process. This preliminary initialization ensures that even if read operations occur concurrently, the output circuit cannot retain or output garbage data during the reset period.
2Adaptability or versatility
If the output buffer retains data during soft reset, then data buffering function is maintained, but data contention and garbage data occur
Solution Approach 1:
The output buffer dynamically changes its state based on the reset signal. During soft reset, the buffer transitions to a high-impedance state that prevents data retention and output. After reset completion, the buffer returns to normal operation mode, allowing data buffering and transfer. This dynamic state change eliminates data contention while preserving the buffering function when needed.
3Reliability
If internal circuits continue to operate during soft reset, then reset function is achieved, but output data differences occur between write and read operations
Solution Approach 1:
The output circuit is segmented into independent controllable units (output buffers) that can be individually initialized to high-impedance state during reset. This segmentation allows the reset function to be applied selectively to the output path without affecting other internal circuits, ensuring that write and read operations produce consistent results even while other parts of the system continue operating.
Data Source
AI summary
An output circuit and method thereof. In an example, the output circuit may include an output buffer configured to buffer output data and to transfer the buffered output data to an output node, the output buffer initializing the output node in response to a triggering signal. In another example, the method may include buffering output data in response to an output buffer enabling signal, transferring the buffered output data to an output node and initializing the output node of an output buffer in response to a triggering signal.