Output Buffer Supply Filtering for High-Frequency Signal Integrity
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Solution Overview
Problem
High-frequency data input/output in electronic devices challenges the capability of output buffers to maintain signal integrity due to variations in output resistance and supply voltage, affecting the accuracy of output data.
Innovation Solution
The implementation of a pre-buffer voltage supply filtering circuit that stabilizes the gate voltage of final NMOS and PMOS transistors by using a portion of the total capacitance for filtering the voltage supplied to pre-buffers, improving the output buffer's capability without requiring additional total capacitance, thus reducing variance in gate voltage and enhancing signal integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If a large capacitance is used to stabilize the supply voltage applied to the output buffer, then the supply voltage stability is improved, but the device area and complexity increase
Solution Approach 1:
The patent divides the single large capacitance into multiple smaller capacitances (first capacitance coupled to the first pre-buffer and second capacitance coupled to the second pre-buffer). This segmentation achieves the same voltage stabilization effect while reducing the total device area occupied by capacitive elements.
Solution Approach 2:
The patent applies different capacitance values to different pre-buffers based on their specific requirements. The first capacitance is coupled to the first pre-buffer and the second capacitance is coupled to the second pre-buffer, allowing each to be optimized locally rather than using a uniform large capacitance for the entire output buffer.
2Reliability
If additional total capacitance is used to stabilize supply voltage, then signal integrity is improved, but the device complexity and area increase
Solution Approach 1:
The patent segments the capacitance into multiple smaller units distributed to different pre-buffers, which maintains signal integrity through effective voltage stabilization while reducing overall device complexity compared to a single large capacitance approach.
Solution Approach 2:
The patent combines multiple smaller capacitances to achieve the cumulative effect of a large capacitance for supply voltage stabilization, thereby improving signal integrity without the complexity and area overhead of a single large capacitor.
3Speed
If the output buffer is designed for high-frequency operation, then data processing speed is improved, but signal integrity deteriorates due to voltage variations
Solution Approach 1:
The patent applies low-pass filtering to the supply voltages before they reach the pre-buffers, preliminarily stabilizing the voltages to prevent variations during high-frequency operation. This preliminary stabilization enables high-speed data processing while maintaining signal integrity.
Solution Approach 2:
The patent changes the supply voltage parameters by applying low-pass filtering to remove high-frequency noise and variations, thereby stabilizing the voltage parameters to support high-frequency data processing without compromising signal integrity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves signal integrity at the output pad connected to the output buffer, allowing for higher operational frequencies and reduced total capacitance requirements, thereby increasing data processing speed without compromising accuracy.
Implementation Method 1
a first low-pass supply filter configured to filter the first voltage supply signal and a second low-pass supply filter configured to filter the second voltage supply signal
Implementation Method 2
providing a supply capacitor coupled between power supply lines carrying the first voltage supply signal and the second voltage supply signal
Data Source
AI summary
An electronic device may include one or more output buffers each including a pair of final p-channel metal oxide semiconductor (PMOS) and n-channel metal oxide semiconductor (NMOS) transistors, a first pre-buffer to drive the PMOS transistor, and a second pre-buffer to drive the NMOS transistor. Each output buffer receives power from a pre-buffer supply filtering circuit, which may include a supply capacitor for stabilizing supply voltage, a low-pass first pre-buffer supply filter to filter the voltage supplied to the first pre-buffer, and a low-pass second pre-buffer supply filter the voltage supplied to the second pre-buffer.