Switched Compensation Capacitor Output Buffer for Faster Large-Signal Response
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Solution Overview
Problem
Existing output buffers face challenges in improving large signal response speed without increasing power consumption, as they rely on bias current to charge and discharge compensation capacitors, leading to inefficiencies in dynamic power usage.
Innovation Solution
The implementation of switches to control the electrical connection between the terminals of a compensation capacitor, allowing for slow charging without using bias current, thereby enhancing response speed and reducing dynamic power consumption by maintaining electrical charges without re-charging or re-discharging the capacitor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the compensation capacitor Cc is larger and the bias current is smaller, then the frequency response is maintained, but the large signal response speed becomes slower
Solution Approach 1:
The patent applies dynamics by making the compensation capacitor's connection state changeable through control switches. The capacitor can be dynamically connected or disconnected from the input stage circuit based on operating conditions, allowing the system to adapt between maintaining frequency response and improving large signal response speed without being constrained by a fixed capacitor size.
2Speed
If the bias current is increased to improve large signal response speed, then the response speed increases, but the power consumption increases
Solution Approach 1:
The patent applies preliminary action by pre-charging the compensation capacitor through control switches before the main signal transition occurs. This preliminary charging action prepares the capacitor in advance, so that when the large signal transition happens, the capacitor does not need to be charged by the bias current, thereby improving response speed without increasing power consumption.
Solution Approach 2:
The patent extracts the charging function from the bias current path by introducing separate control switches that provide an independent charging path for the compensation capacitor. This separation allows the capacitor to be charged without relying on the bias current, thus improving response speed while maintaining low power consumption.
3Reliability
If the compensation capacitor is continuously charged and discharged by bias current, then the frequency response is compensated, but additional dynamic power consumption increases
Solution Approach 1:
The patent applies periodic action by using control switches to periodically connect and disconnect the compensation capacitor from the input stage circuit based on the signal transition state. Instead of continuous charging and discharging by bias current, the capacitor is only charged or disconnected periodically when actually needed, significantly reducing dynamic power consumption while maintaining frequency response compensation.
Data Source
AI summary
An output buffer is disclosed. The output buffer includes an input-stage circuit, an output-stage circuit and a compensation circuit. The compensation circuit includes a capacitor, a first switch, a second switch, a third switch, and a fourth switch. The input-stage circuit receives a differential input signal and outputting a response signal. The output-stage circuit receives the response signal and outputting an output signal. The first switch controls a connection between the input-stage circuit and a first terminal of the capacitor. The second switch controls the connection between an output terminal of the compensation circuit and a second terminal of the capacitor. The third switch controls the connection between the input-stage circuit and the second-terminal of the capacitor. The forth switch controls the connection between the output terminal of the compensation circuit and the first terminal of the capacitor.