Output Circuit Backup Copying for Arbitrary Data Access
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Solution Overview
Problem
In systems where source and receiving devices operate in different clock domains, the lack of synchronization can lead to data integrity issues due to potential timing conflicts during data transfer, causing the receiving device to read data at the wrong moment when the source device overwrites new values.
Innovation Solution
A circuit with an output circuit that generates a copy of each digital value halfway through the data period and uses a control signal (DIRECT_BACKUP) to determine whether to output the original or copied data value based on the timing of the data transaction, ensuring valid data transfer without the need for a read command and maintaining data integrity across clock domain differences.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If the receiving device reads data from the buffer in different clock domains without synchronization, then the data transfer can occur at arbitrary access times, but the data integrity is compromised due to timing conflicts when the source device overwrites the buffer
Solution Approach 1:
The patent applies preliminary action by generating a copy of the data value at a predetermined point during the data period before the source device overwrites the buffer. This copy is stored in advance so that if a read operation is initiated after the predetermined point, the receiving device receives the copied data instead of corrupted data. This resolves the contradiction by preparing the data copy beforehand, enabling arbitrary access times while maintaining data integrity.
Solution Approach 2:
The patent directly applies the copying principle by creating a duplicate of each data value at a predetermined point during the data period. The output circuit is configured to output either the current data value from the source device or the copied data value, depending on when the read operation is initiated. This copying mechanism allows the receiving device to read at any time without compromising data integrity, as the copy serves as a backup when the original buffer is being overwritten.
2Productivity
If the source device continuously overwrites the buffer with new data values, then the data production rate is maintained, but the receiving device may read corrupted data during the overwrite operation
Solution Approach 1:
The patent applies copying by generating a duplicate of each data value at a predetermined point during the data period, before the source device overwrites the buffer. This copy is stored in the output circuit, which can then provide either the current data value or the copied data value depending on the timing of the read operation. This allows continuous data production while preventing read corruption.
Solution Approach 2:
The patent uses preliminary action by preparing the data copy in advance at a predetermined point during the data period. This copy is generated before the overwrite operation occurs, ensuring that if a read operation is initiated during or after the overwrite, the receiving device receives valid data from the copy rather than corrupted data. This resolves the conflict between continuous data production and data integrity.
3Reliability
If synchronization mechanisms are added to coordinate the source and receiving devices, then data integrity is improved, but the device complexity increases due to additional control logic
Solution Approach 1:
The patent applies copying by creating a duplicate of each data value at a predetermined point during the data period. The output circuit includes logic to determine whether to output the current data value or the copied data value based on the timing of the read operation initiation. This copying approach maintains data integrity without requiring complex synchronization mechanisms between different clock domains, as the copy serves as a self-contained backup.
Solution Approach 2:
The patent uses preliminary action by generating the data copy in advance at a predetermined point during the data period, before the overwrite operation. This approach simplifies the control logic compared to full synchronization mechanisms, as it only requires timing-based selection between the current data value and the copied data value, rather than complex coordination between unsynchronized clock domains.
Data Source
AI summary
A circuit includes a source device coupled to an output circuit. The source device is configured to produce a sequence of digital values at a rate defined by a data period. The output circuit is configured to receive the sequence of digital values from the source device, generate a copy of each digital value at a predetermined point during the respective data period, and responsive to initiation of a data transaction during a given data period but before the predetermined point, output the digital value from the source device, whereas responsive to initiation of a data transaction during the given data period but after the predetermined point, output the copy of the digital value.