Output Circuit for Wide Voltage Range in Display Drivers

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Solution Overview

Problem

Existing output circuits using MOS transistors for polarity inversion driving in liquid crystal display devices face limitations in achieving a wide voltage range due to the narrow voltage output range of NMOS and PMOS transistors, leading to inefficiencies in switching between positive and negative polarity voltages.

Innovation Solution

The output circuit employs a configuration with P channel and N channel transistors to supply positive and negative polarity voltage signals, using amplification circuits and control switches to manage the voltage range, allowing for wide voltage output while maintaining low breakdown voltage and reduced area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If MOS transistors are used for polarity inversion driving, then switching between positive and negative polarity voltages is achieved, but the voltage output range becomes narrow

Engineering Contradiction:
Improveswitching capabilityVSAvoidvoltage output range
Core Design Contradiction:
Ease of operationVSAdaptability or versatility

Solution Approach 1:

The output circuit is divided into multiple independent switching paths: a first switching path for positive polarity voltages using a PMOS transistor, and a second switching path for negative polarity voltages using an NMOS transistor. Each path can independently handle its respective voltage range, thereby expanding the overall voltage output range while maintaining efficient switching capability.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If switches are designed to handle full liquid crystal drive voltage range, then wide voltage output is achieved, but the breakdown voltage requirement increases device complexity and cost

Engineering Contradiction:
Improvevoltage output rangeVSAvoidbreakdown voltage requirement
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The voltage handling responsibility is segmented between two transistors with different breakdown voltage ratings. The PMOS transistor handles positive polarity voltages up to its breakdown voltage, while the NMOS transistor handles negative polarity voltages up to its breakdown voltage. This segmentation allows each transistor to be designed with lower breakdown voltage specifications than would be required for a single transistor to handle the entire voltage range, thereby reducing device complexity and cost.

Inventive Principle:
Principle #1Segmentation

3Device complexity

If polarity switching is performed through 0V temporary state, then switch breakdown voltage is reduced to half, but switching time and energy loss increase

Engineering Contradiction:
Improveswitch breakdown voltageVSAvoidswitching time
Core Design Contradiction:
Device complexityVSLoss of time

Solution Approach 1:

The circuit performs preliminary action by pre-charging or pre-discharging the liquid crystal panel to an intermediate voltage level before switching polarity. This preparatory step reduces the voltage differential that must be traversed during switching, thereby reducing the time required for polarity transitions and minimizing energy loss, while still benefiting from reduced switch breakdown voltage requirements.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11726356B2Output circuit, display driver, and display device
Publication Date: 2023.08.15 LAPIS SEMICON CO LTD
  • US11726356B2 patent drawing
  • US11726356B2 patent drawing
  • US11726356B2 patent drawing

AI summary

An output circuit is provided, including: a positive polarity voltage signal supplying circuit to supply or block the supply of a positive polarity voltage signal having a voltage higher than a reference power source voltage to a first node; a negative polarity voltage signal supplying circuit to supply or block the supply of a negative polarity voltage signal having a voltage lower than the reference power source voltage to a second node; a first switch of which a source is connected to the first node and a drain is connected to a first output terminal; a second switch of which a source is connected to the second node and a drain is connected to the first output terminal; and third and fourth switches; a first and a second voltage control circuits respectively performing on-off control of the first and second switches.