Output Drive Circuit Duty Cycle Correction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In LPDDR4 and LPDDR4X applications, the high-speed interface standard using LVSTL results in output signal duty cycle deviation due to asymmetrical impedance, affecting signal quality and tolerance, especially under varying temperature and voltage conditions.
Innovation Solution
An output drive circuit with pull-up and pull-down pre-amplification units that adjust duty cycle ratios through amplifier and inverter configurations, ensuring the output signal duty cycle matches the input signal duty cycle, thereby maintaining signal quality across different voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If the output amplitude is set to VDDQ/3 with traditional 50% duty cycle design, then the signal amplitude meets the LVSTL standard requirement, but the output signal duty cycle deviates significantly from 50% due to asymmetrical impedance
Solution Approach 1:
The patent applies asymmetry by designing different pre-amplification units for pull-up and pull-down operations. The pull-up pre-amplification unit and pull-down pre-amplification unit have different circuit configurations to compensate for the asymmetrical impedance caused by the VDDQ/3 output amplitude, thereby restoring the duty cycle to 50%.
Solution Approach 2:
The patent changes the circuit parameters by introducing adjustable pre-amplification stages that can dynamically adjust their gain and timing characteristics. This allows the circuit to compensate for impedance effects and maintain a stable 50% duty cycle despite the fixed VDDQ/3 output amplitude.
2Reliability
If the output amplitude is increased to VDDQ/2, then the signal tolerance improves, but the duty cycle deviation becomes more significant due to impedance mismatch
Solution Approach 1:
The patent applies preliminary action by performing pre-amplification before the final output stage. The pre-amplification units adjust the signal characteristics in advance to counteract the duty cycle distortion that would otherwise occur at the output, ensuring the final signal maintains 50% duty cycle regardless of amplitude settings.
Solution Approach 2:
The patent implements feedback mechanisms where the output signal characteristics are monitored and used to adjust the pre-amplification stage parameters. This closed-loop control ensures that the duty cycle remains stable at 50% while allowing the output amplitude to be optimized for signal tolerance.
3Adaptability or versatility
If process temperature or voltage changes occur, then the operating conditions adapt to environmental variations, but the output signal duty cycle deviates from the preset ratio
Solution Approach 1:
The patent applies dynamics by making the pre-amplification circuit parameters adjustable and adaptive. The circuit can dynamically change its operating characteristics in response to temperature and voltage variations, maintaining stable duty cycle performance across different environmental conditions through real-time parameter adjustment.
Data Source
AI summary
The present invention provides an output driving circuit and a memory device. The output driving circuit is provided with a pull-up pre-amplification unit and a pull-down pre-amplification unit between a signal input terminal and a signal output terminal, the pull-up pre-amplification unit and the pull-down pre-amplification unit adjust the duty cycle ratios of the positive input signal and the negative input signal so that the duty cycle ratios of the output signals at the signal output terminal is the same as that of the input signal at the signal input terminal, which avoids the mismatch of output impedance under different output voltages, thereby eliminating the problem of duty cycle ratio deviation of the output signal that affects the signal quality.