Output Driver Mitigating ISI via Dynamic Mode Selection

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Solution Overview

Problem

Existing output drivers face challenges in compensating for attenuation of transmission data due to Inter-Symbol Interference (ISI) without requiring circuits for generating high and low voltage levels.

Innovation Solution

An output driver that generates a selection signal based on consecutive valid data bits and uses a reference data generation unit to delay input data, transitioning the output data logic state in response to the selection signal, allowing for reduced voltage requirements and mitigating attenuation without high and low voltage circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If circuits for generating high voltage and low voltage are used to mitigate data attenuation, then signal quality is improved, but device complexity increases

Engineering Contradiction:
Improvesignal qualityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by generating a selection signal in advance based on previous data bits before the current data bit is transmitted. This selection signal is used to control the output driver's operation mode, allowing the system to proactively compensate for anticipated ISI effects rather than reacting after attenuation occurs. The selection signal generation unit processes previous data bits to predict and prepare for potential signal degradation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements dynamics by making the output driver's operation mode variable rather than fixed. The output driver can dynamically switch between different operation modes (first operation mode and second operation mode) based on the selection signal. This dynamic adjustment allows the driver to adapt its behavior to the actual signal conditions, optimizing performance without requiring complex voltage generation circuits.

Inventive Principle:
Principle #15Dynamics

2Reliability

If output data transitions are intensified to compensate for attenuation, then signal quality is improved, but capacitance increases

Engineering Contradiction:
Improvesignal qualityVSAvoidcapacitance
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent uses preliminary action by determining in advance whether the output driver should operate in a first operation mode or a second operation mode based on the selection signal generated from previous data bits. This advance determination allows the system to prepare the appropriate operation mode before data transmission, enabling efficient signal transitions without requiring excessive capacitance. The system predicts the need for enhanced transitions and prepares accordingly.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent applies dynamics by enabling the output driver to dynamically switch between different operation modes. In the first operation mode, the driver performs intensified transitions to compensate for attenuation, while in the second operation mode, it operates with normal transitions. This dynamic mode switching allows the system to apply capacitance-intensive operations only when necessary, rather than maintaining high capacitance continuously, thus optimizing the balance between signal quality and capacitance consumption.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS7368949B2Output driver and output driving method for enhancing initial output data using timing
Publication Date: 2008.05.06 SAMSUNG ELECTRONICS CO LTD
  • US7368949B2 patent drawing
  • US7368949B2 patent drawing
  • US7368949B2 patent drawing

AI summary

An output driver for enhancing initial output data using timing includes a selection signal generation unit for generating a selection signal, a reference data generation unit for generating reference data, and a selection unit. The selection signal is activated at the transition point of the input data, generated after being maintained in a same logic state during a number of bit periods that is equal to or greater than a predetermined duration number. The reference data is delayed from the input data by a delay time shorter than one bit period. The selection unit is driven to transition the logic state of the output data depending on the transition of the logic state of any one of the input data and the reference data in response to the selection signal.