Output Scrambling for Reduced Simultaneous Switching in Memory I/O
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Solution Overview
Problem
Simultaneous switching outputs (SSO) in semiconductor devices lead to high power consumption and signal integrity issues due to large spontaneous current and voltage variances, causing logic errors and performance degradation.
Innovation Solution
A method and semiconductor device that incorporates a scrambler to randomize output values before transmission, reducing the number of simultaneous switching outputs by bit-wise XORing with a key, and includes a descrambler to restore original values, thereby minimizing power consumption and signal integrity issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a large scale driver is used to drive large capacitance load rapidly, then the current driving capability at each output is improved, but the spontaneous power consumption increases due to large spontaneous current
Solution Approach 1:
The patent applies preliminary action by scrambling the output values before they are driven to the outputs. The scrambler modifies the second set of values in advance to reduce the number of simultaneous switching outputs, thereby reducing spontaneous power consumption while maintaining the required switching speed capability of the large scale drivers
2Productivity
If a large number of outputs switch simultaneously, then the data transmission efficiency is improved, but the power supply and ground level variance increases due to inductance effect
Solution Approach 1:
The scrambler performs preliminary modification of the output values to reduce simultaneous switching. By changing the second set of values before output, the patent reduces the number of outputs switching at the same time, thereby maintaining data transmission efficiency while reducing power supply and ground level variance caused by inductance effects
3Reliability
If the power supply and ground level variance is reduced, then the signal integrity is improved, but the device complexity increases due to adding scrambler and descrambler circuits
Solution Approach 1:
The patent applies parameter changes by modifying the data values through scrambling operations. The scrambler changes the second set of values to a scrambled version, which alters the switching pattern and reduces simultaneous switching outputs. This parameter transformation approach improves signal integrity by reducing power supply variance while adding only moderate complexity through the scrambler and descrambler circuits
Data Source
AI summary
The disclosure provides a method for reducing an amount of simultaneous switching outputs (SSO) of a device. The method of reducing the amount of simultaneous switching outputs can include driving outputs of the device to a first set of values, scrambling a second set of values to reduce an amount of simultaneous switching outputs resulting from the switching of the first to the second set of values, and driving the outputs of the device to the scrambled second set of values. Further, the method can include descrambling the scrambled second set of values back to the second set of values.