Oval Conductive Bump for Warpage-Resistant Wafer Packaging
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Solution Overview
Problem
Wafer level packaging technology faces challenges with substrate warpage leading to poor control over bump connections between substrates and printed circuit boards, resulting in potential electrical disconnection due to cracking of conductive bumps.
Innovation Solution
Designing oval-shaped landing areas with a longest axis for conductive bumps, which are less prone to cracking and maintain electrical connection even when the substrate warps, ensuring reliable contact with the printed circuit board.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If wafer level packaging technology is used to achieve miniaturization and higher functions, then electronic components become lighter, smaller and more powerful, but substrate warpage occurs leading to poor bump connection control
Solution Approach 1:
The patent applies asymmetry by designing the conductive bump with an oval cross-section rather than a symmetric circular shape. The oval bump has a longer axis and shorter axis, where the longer axis is oriented perpendicular to the substrate warpage direction. This asymmetric geometry allows the bump to better accommodate substrate warpage while maintaining electrical connection, preventing complete cracking that would occur with symmetric circular bumps.
2Productivity
If substrate size is increased for WLP technology, then number of chips per wafer increases, but bump connections at peripheral region become unreliable due to warpage
Solution Approach 1:
The oval-shaped conductive bump with asymmetric geometry (longer axis perpendicular to warpage direction) enables reliable bump connections at peripheral regions of large substrates. The asymmetric shape provides tolerance against substrate warpage, maintaining manufacturing precision for bump connections even when producing high numbers of chips per wafer.
3Ease of manufacture
If traditional circular bump design is used, then manufacturing is simpler, but complete cracking occurs leading to electrical disconnection when substrate warps
Solution Approach 1:
The oval cross-section of the conductive bump introduces asymmetry that prevents complete cracking while maintaining electrical connection. Although slightly more complex than circular bumps, the oval shape can be formed through standard electroplating processes by controlling deposition patterns, achieving a balance between manufacturing ease and connection reliability.
Solution Approach 2:
The patent employs spheroidality by using an oval (elliptical) cross-section for the conductive bump instead of a circular one. This curved geometric form with different radial dimensions allows the bump to flex and accommodate substrate warpage without complete fracture, maintaining electrical connectivity under thermal stress.
Data Source
AI summary
A method for manufacturing a semiconductor structure includes: receiving a semiconductive substrate with a post passivation interconnect including an oval landing area; forming a first conductor on the oval landing area; forming a polymer layer above the semiconductive substrate, thereby surrounding a portion of the first conductor; polishing the polymer layer and the first conductor in order to form a planarized surface; and forming a second conductor on the polished first conductor.


