Selective Preprogramming of Over-Erased NAND Cells for Retention

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Solution Overview

Problem

Nonvolatile memory devices with three-dimensional structures face increased interference or disturbance between memory cells, leading to degraded retention characteristics as memory cells are excessively erased.

Innovation Solution

A preprogram operation is performed to increase the threshold voltages of over-erased memory cells before data programming, reducing disturbance and enhancing retention characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If memory cells are excessively erased to increase memory capacity and integration degree, then memory capacity increases, but retention characteristics are degraded

Engineering Contradiction:

Improvememory capacityVSAvoidretention characteristics

Core Design Contradiction:

Quantity of substanceVSReliability

Solution Approach 1:

The patent applies preliminary action by performing a preprogram operation before the main data program operation. The preprogram operation proactively increases the threshold voltages of over-erased memory cells to a level that prevents future retention issues, thereby addressing the retention characteristic degradation before it occurs during normal operation.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The patent applies preliminary anti-action by counteracting the harmful effect of over-erasure before it causes retention problems. The preprogram operation applies a compensatory programming action to raise the threshold voltages of over-erased cells, neutralizing the negative impact of excessive erasure on retention characteristics.

Inventive Principle:

Principle #9Preliminary anti-action

2Reliability

If a preprogram operation is performed on over-erased memory cells, then retention characteristics are enhanced, but operation time increases

Engineering Contradiction:

Improveretention characteristicsVSAvoidoperation time

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent applies local quality by selectively applying the preprogram operation only to memory cells that are identified as over-erased, rather than performing the operation on all memory cells. This targeted approach reduces the total operation time while still addressing the retention characteristics of the problematic cells.

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The patent applies partial action by performing the preprogram operation on only a subset of memory cells (those in the over-erased group) rather than all memory cells. This partial application of the operation reduces the overall time cost while achieving the retention enhancement goal for the specific cells that need it.

Inventive Principle:

Principle #16Partial or excessive action

3Device complexity

If three-dimensional vertical NAND structure is used to increase integration degree, then device integration increases, but interference between memory cells increases

Engineering Contradiction:

Improveintegration degreeVSAvoidinterference between memory cells

Core Design Contradiction:

Device complexityVSObject-affected harmful factors

Solution Approach 1:

The patent applies parameter changes by modifying the threshold voltage parameter of over-erased memory cells through the preprogram operation. By adjusting this critical parameter, the patent compensates for the increased interference effects caused by the three-dimensional vertical NAND structure, thereby maintaining reliable operation despite the higher integration density.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS12512170B2Method of determining and preprogramming over-erases groups of memory cells

Publication Date: 2025.12.30 SAMSUNG ELECTRONICS CO LTD

AI summary

A method of controlling a nonvolatile memory device, includes: determining, based on a write address, whether selected memory cells of the nonvolatile memory device corresponding to the write address are included in an over-erased group; based on the selected memory cells being included in the over-erased group, performing a preprogram operation to increase threshold voltages of an over-erased state of the selected memory cells; and after completion of the preprogram operation, performing a data program operation to store write data in the selected memory cells.