Overdrive I/O Circuit Topology to Limit Transistor Aging
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Solution Overview
Problem
Existing over drive circuits suffer from transistor aging due to excessive source-drain voltage, leading to potential damage and integrity issues in the output signal.
Innovation Solution
The over drive circuit is redesigned with multiple P-type and N-type transistors connected in series, where the last N-type transistor is replaced by smaller transistors in parallel, and the transistors are turned on in sequence to reduce stress on the source-drain voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If a stacked structure of transistors is used to generate over drive voltage, then the over drive voltage higher than nominal voltage can be output, but the transistor may bear over stress and suffer from aging effect
Solution Approach 1:
The patent divides the single high-voltage transistor into multiple transistors connected in series, where each transistor handles a portion of the total voltage. Specifically, it uses a first transistor connected to OVDD, a second transistor connected to VDD, and a third transistor connected to ground, with intermediate nodes between them. This segmentation reduces the voltage stress on each individual transistor while maintaining the overall over drive voltage output capability.
Solution Approach 2:
The patent introduces intermediate nodes (first intermediate node and second intermediate node) between the series-connected transistors. These intermediate nodes serve as mediators that distribute the voltage stress across multiple devices. The control circuitry uses these intermediate nodes to sequentially activate transistors, ensuring that no single transistor bears the full over drive voltage stress, thereby reducing aging effects.
2Productivity
If the over drive circuit operates with high source-drain voltage, then the over drive function is achieved, but the integrity of the output signal deteriorates due to aging
Solution Approach 1:
The patent implements dynamic control of the series-connected transistors through sequential activation. The control circuitry activates transistors in a specific sequence (first transistor, then second, then third) based on the operational requirements. This dynamic operation allows the circuit to maintain over drive functionality while distributing the stress over time and across multiple devices, preserving output signal integrity by preventing any single transistor from experiencing continuous high stress.
Data Source
AI summary
An over drive circuit and an input/output circuit are provided. The over drive circuit includes multiple P-type transistors connected to each other in series and a first N-type transistor connected to the P-type transistors in series. One end of the over drive circuit is coupled to a first voltage. Transistors connected in parallel connected to the first N-type transistor in series. Multiple N-type transistors with smaller size than the first N-type transistor are turned on in sequence.


