Overhanging Semiconductor Chip Design for Pad-Constrained Assembly

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Solution Overview

Problem

The existing method of attaching semiconductor chips to substrate pads requires larger assembly pads whenever the chip size increases, leading to increased time and costs due to the need for new pad generations, as the chip areas must be larger than the assembly pad areas to accommodate adhesive bulges.

Innovation Solution

A two-step singulation process is used to create semiconductor chips with a larger active side and a smaller passive side, allowing the active side to overhang the passive side, which maintains the required circuitry area while accommodating the available assembly pad size, by forming linear grooves and slits on the wafer to create chips with concave curved sidewalls.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If chip area is increased to accommodate larger circuitry, then circuit functionality is improved, but assembly pad area must be increased to accommodate adhesive bulges

Engineering Contradiction:
Improvechip active side areaVSAvoidassembly pad area
Core Design Contradiction:
Area of moving objectVSArea of stationary object

Solution Approach 1:

The chip is segmented into two distinct areas: a larger active side for circuitry and a smaller passive side for attachment. The passive side is intentionally made smaller than the active side, allowing the chip to overhang the assembly pad. This segmentation enables the active side area to be increased for better circuit functionality without requiring a proportional increase in assembly pad area.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The chip geometry is made asymmetric by creating different sized sides. The active side is larger than the passive side, breaking the traditional symmetric chip shape. This asymmetry allows the larger active side to extend beyond the assembly pad boundaries, eliminating the requirement for the pad area to match or exceed the chip area.

Inventive Principle:
Principle #4Asymmetry

2Adaptability or versatility

If assembly pad area is increased to accommodate larger chips, then chip assembly flexibility is improved, but production time and costs increase

Engineering Contradiction:
Improvechip assembly flexibilityVSAvoidproduction time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

By segmenting the chip into active and passive sides with different areas, the invention enables assembly on existing pad sizes without requiring new pad generations. This maintains assembly flexibility for different chip sizes while avoiding the time-consuming process of developing and qualifying new pad designs.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The passive side is preliminarily designed to be smaller than the active side during chip fabrication. This preliminary design decision enables the chip to be assembled on existing pads without requiring subsequent pad redesign, thereby preventing production delays and additional costs associated with new pad generations.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If adhesive material is allowed to bulge from chip edges for quality control, then assembly quality is improved, but chip area must be larger than pad area

Engineering Contradiction:
Improveassembly qualityVSAvoidchip area
Core Design Contradiction:
ReliabilityVSArea of moving object

Solution Approach 1:

The invention segments the chip into a smaller passive side for attachment and a larger active side for circuitry. This segmentation allows adhesive bulging to occur only on the smaller passive side, maintaining quality control visibility while preserving the larger active side area for circuit functionality without requiring the entire chip to be larger than the pad.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS9768098B2Packaged semiconductor device having stacked attached chips overhanging the assembly pad
Publication Date: 2017.09.19 TEXAS INSTRUMENTS INC
  • US9768098B2 patent drawing
  • US9768098B2 patent drawing
  • US9768098B2 patent drawing

AI summary

A semiconductor device comprising a stack of semiconductor chips. The semiconductor chips have an electrically active side and an opposite electrically inactive side. The active sides bordered by an edge having first lengths and the inactive sides bordered by a parallel edge having a second lengths smaller than the first lengths. A substrate has an assembly pad bordered by a linear edge having a third length equal to or smaller than the first lengths. The inactive chip side attached to the pad so that the edge of the first lengths are parallel to the edge of the third length. The active side of the attached chip forms an overhang over the pad, when the third length is smaller than the first lengths.