Overlapping Capacitor Structure for Metal Oxide Transistor Isolation
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Solution Overview
Problem
Current semiconductor devices face challenges in miniaturization, high integration, large capacitance, and maintaining favorable electrical characteristics and reliability, particularly due to issues with impurity diffusion from capacitors into transistors.
Innovation Solution
A semiconductor device design featuring a capacitor overlapping with a metal oxide transistor, with insulators inhibiting impurity passage and conductors with curved surfaces to reduce contact resistance, along with specific materials and deposition methods to enhance capacitance and productivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If a capacitor is provided over a transistor including a metal oxide, then miniaturization and high integration are achieved, but impurity diffusion from the capacitor into the transistor degrades electrical characteristics
Solution Approach 1:
A barrier insulator is introduced between the capacitor and the metal oxide transistor to prevent impurity diffusion. This intermediary layer blocks harmful impurities from the capacitor from reaching the transistor channel, thereby maintaining electrical characteristics while enabling close integration and miniaturization of the device structure.
Solution Approach 2:
The insulator layer is segmented into a barrier insulator and a planarizing insulator with distinct functions. The barrier insulator specifically addresses impurity blocking, while the planarizing insulator provides surface flatness, allowing each segment to optimize its function without interfering with the other.
2Reliability
If the insulator thickness is increased to prevent impurity diffusion, then transistor electrical characteristics are maintained, but capacitor capacitance is reduced
Solution Approach 1:
The insulator is divided into two functional segments: a thin barrier insulator (5-20 nm) that prevents impurity diffusion, and a thicker planarizing insulator that provides surface flatness and contributes to capacitance. This segmentation allows the barrier insulator to be thin enough to maintain capacitance while still providing effective impurity blocking.
Solution Approach 2:
The insulator structure uses composite materials with different properties: the barrier insulator uses materials with high impurity blocking capability (such as aluminum oxide or silicon nitride), while the planarizing insulator uses materials optimized for capacitance and planarization (such as silicon oxide). This composite structure achieves both impurity prevention and capacitance maintenance.
3Ease of manufacture
If a planarizing insulator is added to improve surface flatness, then subsequent processing is facilitated, but device complexity increases
Solution Approach 1:
The planarizing insulator serves multiple functions simultaneously: it provides surface flatness for subsequent processing, acts as an additional impurity barrier, and contributes to the overall capacitance of the structure. This multi-functionality reduces the need for additional separate layers, thereby limiting the increase in device complexity.
Solution Approach 2:
The barrier insulator and planarizing insulator are merged into a continuous insulator layer structure that can be formed in a integrated process flow. The combination of these layers with different functions creates a unified structure that simplifies manufacturing while providing comprehensive performance benefits.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design enables miniaturization, high integration, and improved electrical characteristics while preventing impurity diffusion, resulting in a semiconductor device with increased capacitance and reliability.
Implementation Method 1
an insulator that inhibits passage of impurities such as water and hydrogen is provided between the transistor and the capacitor
Implementation Method 2
An upper portion of the conductor has a curved surface, whereby the contact resistance between the conductor and a lower electrode of the capacitor can be reduced
Implementation Method 3
a capacitor with large capacitance
Data Source
AI summary
A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a transistor and a capacitor. The transistor includes a metal oxide and a first conductor that is electrically connected to the metal oxide. The capacitor includes a first insulator which is provided over the metal oxide and which the first conductor penetrates; a second insulator provided over the first insulator and including an opening reaching the first insulator and the first conductor; a second conductor in contact with an inner wall of the opening, the first insulator, and the first conductor; a third insulator provided over the second conductor; and a fourth conductor provided over the third insulator. The first insulator has higher capability of inhibiting the passage of hydrogen than the second insulator.