Overlapping Conductor Layers for Compact Display Substrate Wiring
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Solution Overview
Problem
Existing display technologies face challenges in reducing the size of wirings on display substrates while maintaining electrical and technological requirements, as narrowing the width of wirings becomes increasingly difficult in the manufacturing process.
Innovation Solution
The implementation of a display substrate design that includes data wirings in multiple conductor layers, with overlapping orthographic projections and patterned connections, along with an electrostatic discharging circuit and unit testing circuit in the peripheral area, to optimize space utilization and functionality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If the width of wirings is decreased to reduce space occupation, then the area occupied by wirings is reduced, but the manufacturing precision becomes more difficult to achieve
Solution Approach 1:
The patent transitions from a single-plane wiring layout to a three-dimensional multi-layer conductor structure. Data wirings are distributed across first, second, and third conductor layers with different heights, allowing wirings to occupy vertical space rather than competing for horizontal area. This dimensional change enables reduced overall wiring area while maintaining adequate spacing within each layer for manufacturability.
Solution Approach 2:
The patent implements nested wiring arrangements where data wirings in different conductor layers are positioned to overlap in the planar projection. Specifically, data wirings in the first and third conductor layers are arranged to overlap with each other, and data wirings in the second conductor layer overlap with wirings in the first or third layers. This nesting allows multiple wirings to occupy the same footprint area at different heights, reducing the total area required while maintaining manufacturing feasibility.
2Area of moving object
If data wirings are arranged in multiple conductor layers with overlapping projections, then the area occupied by wirings is reduced, but the device complexity increases
Solution Approach 1:
The patent divides the wiring system into three distinct conductor layers (first, second, and third), each containing specific data wirings. This segmentation allows the complex wiring function to be distributed across simpler, manageable layers. Each layer can be designed and manufactured independently with standard spacing, reducing the overall complexity compared to a single dense layer while achieving compact area utilization through vertical stacking.
3Area of stationary object
If the frame size is reduced to meet narrower frame requirements, then the overall device size is reduced, but the wiring space becomes more constrained
Solution Approach 1:
The patent resolves the conflict between reduced frame size and adequate wiring space by utilizing the vertical dimension through multiple conductor layers. Data wirings are arranged in three stacked layers with overlapping planar projections, allowing the wiring system to fit within a smaller horizontal footprint while maintaining sufficient wiring area through vertical expansion. This enables narrower frame designs without compromising wiring functionality.
Data Source
AI summary
A display substrate and a display panel, the display substrate includes a base substrate and a plurality of sub-pixels, a plurality of data lines and a plurality of data wirings located on the base substrate. The plurality of data wirings includes a first data wiring, a second data wiring and a third data wiring that are periodically arranged. The first data wiring is located in a first conductor layer. The second data wiring is located in a second conductor layer. The third data wiring is located in a third conductor layer. An orthographic projection of a part of at least one first data wiring on the base substrate overlaps with an orthographic projection of a part of at least one third data wiring on the base substrate.