Overlapping Die Pad Package Layout for Higher Insulation Voltage

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Solution Overview

Problem

Semiconductor devices with multiple elements in a single package face challenges in maintaining insulation withstand voltage due to differences in power supply voltages between conduction paths, leading to potential electrical insulation failures.

Innovation Solution

A semiconductor device design featuring conductive support members with die pads and insulating elements, where semiconductor elements are mounted on separate die pads with overlapping configurations and sealed by a resin, enhancing insulation through specific geometrical arrangements and surface roughness to manage electrical field distribution.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple semiconductor elements are mounted in one package with different power supply voltages, then integration density is improved, but insulation withstand voltage deteriorates

Engineering Contradiction:
Improveintegration densityVSAvoidinsulation withstand voltage
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent transitions from planar separation to three-dimensional overlapping arrangement of die pads. The first and second die pads overlap when viewed along the first direction, utilizing the thickness direction (z-axis) to create vertical separation. This dimensional change allows higher integration density while maintaining insulation through increased creepage distance in the vertical dimension.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent introduces near-angle portions with specific curvature radii at the peripheral edges of die pads. The first near-angle portion has a first curvature radius and the second near-angle portion has a second curvature radius, where these curved transitions prevent electric field concentration at sharp corners. This curvature design enhances insulation withstand voltage by distributing electric field stress evenly across the die pad edges.

Inventive Principle:
Principle #14Spheroidality (Curvature)

2Area of stationary object

If die pads are arranged to overlap in plan view, then area utilization is improved, but electric field concentration worsens

Engineering Contradiction:
Improvearea utilizationVSAvoidelectric field concentration
Core Design Contradiction:
Area of stationary objectVSStress or pressure

Solution Approach 1:

The patent applies curved near-angle portions at the edges of overlapping die pads to eliminate sharp corners that would concentrate electric fields. The first die pad has a first near-angle portion with a first curvature radius, and the second die pad has a second near-angle portion with a second curvature radius. These curved transitions distribute electric field stress uniformly, preventing breakdown while maintaining compact overlapping geometry.

Inventive Principle:
Principle #14Spheroidality (Curvature)

Solution Approach 2:

The patent applies different curvature radii at different locations of the die pads. The first curvature radius and second curvature radius are specifically designed to match local geometric requirements at the near-angle portions. This localized optimization ensures adequate electric field distribution at critical edges while maintaining overall compactness and area efficiency.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design significantly improves insulation withstand voltage by reducing electric field strength and enhancing dielectric strength between circuits, thereby ensuring reliable operation in applications like electric vehicles and hybrid vehicles.

Implementation Method 1

an insulating element that conducts to the first semiconductor element and the second semiconductor element and insulates the first circuit and the second circuit from each other

Methodology Applied
Scientific EffectElectrical insulation: Dielectric

Implementation Method 2

a sealing resin that covers the first die pad, the second die pad, the first semiconductor element, the second semiconductor element, and the insulating element and insulates the first die pad and the second die pad from each other

Methodology Applied
Scientific EffectElectrical insulation: Dielectric

Implementation Method 3

when viewed along the thickness direction, a peripheral edge of the first die pad has a first near-angle portion including a first end portion in a second direction orthogonal to both the thickness direction and the first direction, and wherein the first near-angle portion is separated from the second die pad in the first direction toward the first end portion in the second direction

Methodology Applied
Scientific EffectElectric field distribution: Electric Field

Data Source

PatentUS12159819B2Semiconductor device
Publication Date: 2024.12.03 ROHM CO LTD
  • US12159819B2 patent drawing
  • US12159819B2 patent drawing
  • US12159819B2 patent drawing

AI summary

A semiconductor device includes a first die pad, a second die pad, a first semiconductor element, a second semiconductor element, an insulating element, first terminals, second terminals, and a sealing resin. The sealing resin has a top surface, a bottom surface, and a first side surface connected to the top surface and the bottom surface. The first side surface includes a first region connected to the top surface, a second region connected to the bottom surface, and a third region connected to the first region and the second region, the plurality of first terminals being exposed to the third region. A surface roughness of each of the top surface, the bottom surface, the first region, and the second region is larger than a surface roughness of the third region.