Overlapping Diodes for Compact Electrostatic Protection

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Solution Overview

Problem

Existing display devices face challenges in minimizing the non-display region while maintaining effective electrostatic protection and manufacturing efficiency.

Innovation Solution

The display device incorporates a display panel with a base layer overlapping both the display and non-display regions, featuring a pad electrode, pixels with light-emitting elements and transistors, data lines, electrostatic protection circuits, and connection electrodes. The electrostatic protection circuit includes a first diode with a silicon semiconductor and a second diode with an oxide semiconductor, disposed to overlap each other, minimizing the occupied area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the electrostatic protection circuit is designed with traditional lateral arrangement, then the protection function is achieved, but the non-display region area increases

Engineering Contradiction:
Improveelectrostatic protection functionVSAvoidnon-display region area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent transitions from a traditional lateral arrangement of diodes in the same plane to a vertical stacked arrangement where the second diode is positioned above the first diode. This dimensional change allows the electrostatic protection circuit to maintain its protection function while occupying significantly less planar area in the non-display region, thereby reducing the overall non-display region area of the display device.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent implements a nested structure where the second diode is vertically positioned above the first diode, creating a compact stacked configuration. This nesting approach allows both diodes to occupy overlapping or adjacent vertical spaces, maximizing space utilization and minimizing the horizontal footprint of the electrostatic protection circuit in the non-display region.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Reliability

If the electrostatic protection circuit occupies larger area, then the protection coverage is improved, but the display region ratio decreases

Engineering Contradiction:
Improveelectrostatic protection coverageVSAvoiddisplay region area ratio
Core Design Contradiction:
ReliabilityVSArea of moving object

Solution Approach 1:

By arranging the second diode vertically above the first diode rather than laterally adjacent to it, the patent reduces the planar footprint of the electrostatic protection circuit. This dimensional reorganization ensures that the protection coverage is maintained through proper electrical connectivity while minimizing the space consumed in the non-display region, thereby preserving a higher display region area ratio.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Area of stationary object

If the electrostatic protection circuit is minimized in area, then the non-display region is reduced, but the manufacturing complexity increases

Engineering Contradiction:
Improvenon-display region areaVSAvoidelectrostatic protection circuit structure
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The vertical stacked arrangement of the second diode above the first diode creates a compact nested structure that minimizes the planar area occupied by the electrostatic protection circuit. This configuration reduces the non-display region area while the manufacturing complexity is managed through standardized vertical stacking processes that are compatible with existing semiconductor fabrication techniques.

Inventive Principle:
Principle #7Nested doll (Nesting)

Solution Approach 2:

The patent utilizes the vertical dimension to house the second diode above the first diode, transforming a two-dimensional lateral layout into a three-dimensional stacked layout. This dimensional change reduces the planar footprint without significantly increasing manufacturing complexity, as vertical stacking is a well-established fabrication approach in the semiconductor industry.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration reduces the non-display region, enhances electrostatic protection by maintaining voltage levels between specific limits, and optimizes manufacturing by minimizing the area occupied by the electrostatic protection circuit.

Implementation Method 1

The electrostatic protection circuit may include a first diode disposed in the non-display region and a second diode disposed on the first diode and overlapping at least a portion of the first diode in a plan view. The first diode may include a silicon semiconductor, and the second diode may include an oxide semiconductor.

Methodology Applied
Scientific EffectDiode conduction: Diode

Data Source

PatentUS20250126994A1Display device and manufacturing method of the same
Publication Date: 2025.04.17 SAMSUNG DISPLAY CO LTD
  • US20250126994A1 patent drawing
  • US20250126994A1 patent drawing
  • US20250126994A1 patent drawing

AI summary

A display device including a display panel including a display region and a non-display region, wherein the display panel includes a base layer overlapping the display region and the non-display region, a pad electrode exposed through a lower surface of the base layer, a pixel disposed on an upper surface of the base layer and including a light-emitting element overlapping the display region, a data line disposed on the upper surface of the base layer and overlapping the display region and the non-display region, and electrically connected to the pad electrode an electrostatic protection circuit electrically connected to the data line, wherein the electrostatic protection circuit includes a first diode disposed in the non-display region and a second diode overlapping at least a portion of the first diode in a plan view.