Overlapping Drive Circuit Patterns Reduce Parasitic Inductance
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Solution Overview
Problem
The efficiency of light source devices, including those with semiconductor lasers and LEDs, is hindered by parasitic inductance in their drive circuits, which becomes significant with varying currents, making it difficult to achieve high efficiency.
Innovation Solution
The drive circuit design involves overlapping patterns on multiple layers of a board to reduce parasitic inductance, with equal widths and reverse current directions through these patterns, and the use of both rigid and flexible boards to enhance freedom of arrangement and minimize inductance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If conventional drive circuit layout is used, then ease of manufacture is maintained, but parasitic inductance increases reducing efficiency
Solution Approach 1:
The patent transitions from planar routing to three-dimensional overlapping routing by forming first and second patterns on different layers of the circuit board that overlap when viewed from the normal direction. This dimensional change reduces the loop area and thus parasitic inductance while maintaining manufacturing feasibility through standard multi-layer PCB technology.
Solution Approach 2:
The return path is segmented into multiple layers, with the first pattern on one layer and the second pattern on another layer. This segmentation allows independent optimization of each layer's routing while achieving overall inductance reduction through their overlapping configuration.
2Loss of energy
If pattern widths are made unequal, then routing flexibility increases, but parasitic inductance reduction is suboptimal
Solution Approach 1:
The patent deliberately creates a symmetric configuration in terms of pattern widths, making the first and second patterns substantially equal in width. This controlled symmetry optimizes the magnetic field cancellation effect and minimizes parasitic inductance, while the overlapping geometry itself provides the necessary routing flexibility.
3Loss of energy
If semiconductor light emitting element is disposed on the surface of rigid board, then manufacturing is simplified, but parasitic inductance is reduced
Solution Approach 1:
The patent positions the semiconductor light emitting element on the side surface of the circuit board rather than on the top or bottom surface. This side-mounting configuration, combined with the overlapping patterns, creates a compact three-dimensional current loop that minimizes parasitic inductance while accommodating the element in available space.
Data Source
AI summary
A drive circuit for driving a semiconductor light emitting element includes a board, a first pattern formed in a first layer of the board so as to be electrically connected to an anode of the semiconductor light emitting element, and a second pattern formed in a second layer of the board so as to be electrically connected to a cathode of the semiconductor light emitting element, and the first pattern and the second pattern are formed so as to overlap with each other when viewed in a direction along a normal line of the board.


