Overlapping Display Driver Layers for High-PPI Near-Eye Panels
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Solution Overview
Problem
Display devices with a short distance between the display surface and the user, such as head-mounted displays and electronic viewfinders, suffer from pixel granularity issues, leading to decreased immersion and realistic feeling, particularly due to low pixel density and resolution.
Innovation Solution
A display device design featuring a stacked structure with overlapping gate driver and source driver circuits, utilizing metal oxide transistors with elements like Al, Ga, Y, or Sn, and Zn, to achieve high pixel density and resolution, enabling high-definition, high-luminance, and high-dynamic-range image display.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Temperature
If the display device is positioned close to the user (short distance), then the sense of immersion and realism is improved, but pixel granularity becomes prominent and decreases the sense of immersion
Solution Approach 1:
The patent applies parameter changes by increasing the pixel density to extremely high values (1000 ppi or higher, preferably 5000 ppi or higher, still preferably 10000 ppi) and the resolution to 4K, 5K, or higher. This changes the physical parameters of the display to reduce the visibility of individual pixels when viewed from close distance, thereby resolving the contradiction between close positioning and pixel granularity.
2Manufacturing precision
If the pixel density is increased to reduce pixel perception, then the image quality is improved, but the device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent employs a stacked layer structure where the gate driver circuit and source driver circuit are arranged in a first layer and the display portion is arranged in a second layer. This dimensional arrangement allows high pixel density without proportionally increasing planar device complexity, as the driver circuits are positioned above or below the display pixels rather than occupying additional planar space.
3Manufacturing precision
If the pixel density is increased to achieve high resolution, then the image quality is improved, but the power consumption increases
Solution Approach 1:
The patent segments the driver circuits into separate first and second layers, allowing independent optimization of power consumption for different components. The gate driver circuit and source driver circuit can be designed with lower power consumption characteristics since they are segmented from the high-density pixel array, thereby reducing overall power consumption while maintaining high pixel density.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides a display device with significantly increased pixel density, enabling high-definition and high-luminance image display with a high dynamic range, suitable for applications like VR, AR, and electronic viewfinders, while reducing power consumption and frame size.
Implementation Method 1
A transistor using a metal oxide has field-effect mobility higher than that in the case where amorphous silicon is used; thus, a high-performance display device provided with driver circuits can be obtained.
Implementation Method 2
A metal oxide that can be used for a semiconductor layer can be formed by a sputtering method or the like
Data Source
AI summary
A high-definition display device is provided. A small display device is provided. In the display device, a first layer and a second layer are stacked and provided. The first layer includes a gate driver circuit and a source driver circuit, and the second layer includes a display portion. The gate driver circuit and the source driver circuit are provided to include a region overlapping with the display portion. The gate driver circuit and the source driver circuit have an overlap region where they are not strictly separated from each other. Five or more gate driver circuits and five or more source driver circuits can be provided.