Overlapping Error Correction Coding for Smaller ECC Circuits
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Solution Overview
Problem
Existing error correcting codes in flash memories and telecommunications require increased redundancy bits for improved error correction, leading to larger circuitry and longer data retrieval times, necessitating a method to enhance error correcting performance without increasing redundant bits.
Innovation Solution
A novel error correcting code generation method that divides data into blocks, generates error correcting codes by combining adjacent blocks, and applies overlapping coding to increase correcting strength, allowing for higher error correction performance with reduced redundant bits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the number of redundant bits is increased to improve error correcting performance, then the error correction capability is improved, but the circuit size becomes larger and storage capacity is reduced
Solution Approach 1:
The data is divided into multiple data blocks, and error correcting codes are generated for each block separately. This segmentation allows the error correction function to be distributed across multiple smaller code generation units, reducing the circuit size required for each individual code generator while maintaining overall error correction capability.
Solution Approach 2:
Adjacent data blocks are combined and coded together to generate error correcting codes with overlapping portions. This merging approach allows shared code portions to be utilized across multiple blocks, reducing the total number of redundant bits needed while improving error correction performance through the overlapping structure.
2Reliability
If the number of redundant bits is increased to improve error correcting performance, then the number of correctable error bits increases, but the data retrieval time is increased
Solution Approach 1:
By segmenting data into smaller blocks with individual error correcting codes, the decoding process can be performed on smaller units in parallel or sequentially with reduced computational complexity per block, thereby reducing the overall data retrieval time while maintaining error correction capability.
Solution Approach 2:
Error correcting codes are pre-generated and stored with the data blocks during the coding phase. This preliminary action allows the decoding process to simply retrieve and verify the pre-computed codes rather than performing complex real-time error correction calculations, significantly reducing data retrieval time.
3Reliability
If the number of redundant bits is increased to improve error correcting performance, then the error correction capability is improved, but the storage capacity is reduced
Solution Approach 1:
Adjacent data blocks are merged and coded together with overlapping portions, allowing the same code bits to serve multiple data blocks simultaneously. This reduces the total number of redundant bits required across the entire data set, thereby increasing effective storage capacity while maintaining error correction performance.
Solution Approach 2:
The coding scheme changes the structure of redundant bits from completely independent per-block codes to overlapping shared codes. This parameter change in the code structure reduces the total redundancy required while maintaining or improving error correction capability, thus increasing usable storage capacity.
Data Source
AI summary
A coding method intended to increase the error correction performance without greatly increasing the size of an error correction circuit, the method, as illustrated in FIG. 1A, includes the steps of dividing data constituting one page and yet to be coded into data blocks including a first data block located on one end of the one page to a fourth data block located on the other end of the one page; generating a first error correcting code by coding the first data block; generating a second error correcting code by coding a second data block and a part of the first data block in combination; generating a third error correcting code by coding a third data block and a part of the second data block in combination; and generating a fourth error correcting code by coding a fourth data block and a part of the third data block in combination.