Overlapping Terminal Electrode Layout for Larger SiC Active Regions

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Solution Overview

Problem

Current semiconductor devices face design constraints due to the size and placement of electrodes, which limits the flexibility and efficiency of the active region, particularly in devices using SiC substrates.

Innovation Solution

The semiconductor device incorporates a design where the gate pad overlaps both the main surface gate electrode and source electrode in plan view, allowing for a larger gate pad size that intersects the active region, thereby relaxing design rules and increasing the active region's size without increasing the chip size.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If traditional non-overlapping electrode configuration is used, then manufacturing process is simpler, but design flexibility and electrical connection efficiency are limited

Engineering Contradiction:
Improvedesign flexibilityVSAvoidelectrode configuration complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent transitions from a two-dimensional planar electrode arrangement to a three-dimensional overlapping configuration. Terminal electrodes are positioned to overlap with underlying electrodes in the vertical dimension, creating multiple electrical connection paths through different layers. This dimensional change enables improved electrical connection efficiency and design flexibility without significantly increasing manufacturing complexity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If overlapping electrode configuration is implemented, then electrical connection efficiency improves, but manufacturing precision requirements increase

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidelectrode alignment precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The electrode system is divided into multiple discrete layers with distinct functions. Upper terminal electrodes are segmented to overlap with specific lower electrodes, creating modular connection units. This segmentation allows for standardized manufacturing processes and reduces the overall precision burden by breaking down the alignment task into manageable segments with defined tolerances.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Insulating layers and dielectric materials are introduced as intermediaries between overlapping electrodes of different polarities. These intermediary layers provide electrical isolation while maintaining the overlapping configuration, enabling reliable electrical connections without requiring perfect alignment between conductive elements.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Measurement precision

If multiple terminal electrodes with overlapping portions are added, then current monitoring capability improves, but device structure becomes more complex

Engineering Contradiction:
Improvecurrent monitoring precisionVSAvoiddevice structure complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The overlapping terminal electrode structure serves multiple functions simultaneously: it provides primary electrical connections, enables current monitoring through dedicated sensing portions, and maintains mechanical stability. The same overlapping configuration that improves electrical connection also facilitates current measurement, eliminating the need for separate monitoring structures and reducing overall device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20250015178A1Semiconductor device
Publication Date: 2025.01.09 ROHM CO LTD
  • US20250015178A1 patent drawing
  • US20250015178A1 patent drawing
  • US20250015178A1 patent drawing

AI summary

The semiconductor device includes a semiconductor layer which has a main surface, a switching device which is formed in the semiconductor layer, a first electrode which is arranged on the main surface and electrically connected to the switching device, a second electrode which is arranged on the main surface at an interval from the first electrode and electrically connected to the switching device, a first terminal electrode which has a portion that overlaps the first electrode in plan view and a portion that overlaps the second electrode and is electrically connected to the first electrode, and a second terminal electrode which has a portion that overlaps the second electrode in plan view and is electrically connected to the second electrode.