Overlapping Gate Driving Circuits for Compact Display Substrates

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Solution Overview

Problem

Existing display technologies face challenges in achieving a high screen-to-body ratio due to the large non-display area occupied by scan driving and light-emitting control driving circuits, which affects signal stability and display performance.

Innovation Solution

The array substrate design includes a display area with pixel circuits arranged in an array and non-display areas containing gate driving circuits, where the first and second gate driving circuits are electrically connected to different transistors and partially overlap in the non-display area, reducing the overall size of the non-display area and improving signal transmission.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If scan driving circuit and light-emitting control driving circuit are provided in peripheral non-display area, then display device can achieve high screen-to-body ratio, but non-display area occupied by driving circuits becomes large

Engineering Contradiction:
Improvescreen-to-body ratioVSAvoidnon-display area occupied by driving circuits
Core Design Contradiction:
Area of moving objectVSArea of stationary object

Solution Approach 1:

The patent merges the scan driving circuit and light-emitting control driving circuit into a shared non-display area. The first gate driving circuit (scan driving) and second gate driving circuit (light-emitting control) are arranged to have overlapping orthographic projections, allowing them to share the same physical space on the substrate. This integration reduces the total area occupied by driving circuits while maintaining both functions, thereby increasing the screen-to-body ratio.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent utilizes the third dimension (vertical stacking) by arranging different functional circuits at different heights on the substrate. The first and second gate driving circuits are positioned at different vertical levels, allowing their orthographic projections to overlap in the planar view while maintaining electrical isolation and functional independence. This spatial arrangement in multiple dimensions enables compact integration without compromising circuit performance.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Area of moving object

If non-display area is reduced to increase screen-to-body ratio, then screen-to-body ratio improves, but signal stability and display performance may be affected

Engineering Contradiction:
Improvescreen-to-body ratioVSAvoidsignal stability
Core Design Contradiction:
Area of moving objectVSReliability

Solution Approach 1:

The patent segments the gate driving functionality into two independent circuits: the first gate driving circuit for scan signals and the second gate driving circuit for light-emitting control signals. Each circuit is independently designed and positioned at different vertical levels, allowing separate optimization of signal paths. This segmentation enables compact arrangement in the non-display area while maintaining dedicated, interference-free signal transmission paths for each function, thus preserving signal stability despite reduced non-display area.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11783772B2Array substrate, display panel, and display device
Publication Date: 2023.10.10 WUHAN TIANMA MICRO ELECTRONICS CO LTD
  • US11783772B2 patent drawing
  • US11783772B2 patent drawing
  • US11783772B2 patent drawing

AI summary

An array substrate, a display panel and a display device are provided. The array substrate has a display area and a non-display area surrounding the display area. The array substrate includes: pixel circuits arranged in the display area in an array along a first direction and a second direction; a first gate driving circuit in the non-display area including first shift register units; and a second gate driving circuit in the non-display area including a plurality of second shift register units in cascade connection. The first gate driving circuit and the second gate driving circuit are electrically connected to different transistors in the pixel circuits; and an orthographic projection of the first gate driving circuit on a plane of the array substrate and an orthographic projection of the second gate driving circuit on the plane of the array substrate at least partially overlap along the second direction.