Overlapping Pad Layout for Zero-Bezel High-Resolution Displays
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Solution Overview
Problem
Existing display devices face challenges in reducing bezel area, ensuring proper application of side line materials, and preventing disconnection of pads due to physical impacts.
Innovation Solution
A display device design that includes a substrate with light-emitting elements, transistors, signal lines, link lines, and upper pads, where the upper pads overlap with signal lines and transistors, reducing the bezel area and enhancing structural integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If pads are disposed separately from signal lines and transistors, then manufacturing is easier, but bezel area increases
Solution Approach 1:
The patent merges the pad structure with signal lines and transistors by disposing pads to overlap with these components. This integration eliminates the need for separate pad areas, thereby reducing bezel area while maintaining electrical connectivity functions through the overlapping configuration.
Solution Approach 2:
The patent transitions from a planar arrangement where pads are separate from signal lines to a three-dimensional overlapping arrangement. By utilizing vertical layering and overlapping in the Z-dimension, the design achieves compact integration that reduces horizontal bezel area while preserving all necessary electrical connections.
2Ease of manufacture
If side lines are applied on inclined side surfaces, then material application is easier, but uniformity is compromised
Solution Approach 1:
The patent changes the geometric parameter of the side surface from inclined to substantially perpendicular relative to the upper surface. This parameter modification enables uniform material application while maintaining ease of manufacturing, as the perpendicular orientation provides a consistent surface for material deposition.
3Ease of operation
If pads are disposed at the edge of substrate, then connection is simplified, but vulnerability to disconnection increases
Solution Approach 1:
The patent combines pads with signal lines and transistors through overlapping disposal, creating an integrated structure that simplifies connection while enhancing reliability. The merged configuration reduces the number of discrete connection points at vulnerable edges while maintaining electrical connectivity through the overlapping arrangement.
Solution Approach 2:
The patent provides beforehand cushioning against physical impact by integrating pads with underlying transistors and signal lines. This overlapping structure creates redundant connection paths and distributes mechanical stress, preventing single-point failures that would occur with edge-disposed pads.
Data Source
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AI summary
A display device includes a substrate on which a plurality of light-emitting elements is disposed; a transistor on the substrate; a plurality of signal lines on the substrate; a plurality of link lines below the substrate; and a plurality of upper pads on the substrate and connected to the plurality of signal lines, in which the plurality of upper pads is disposed to overlap with at least one of the plurality of signal lines and the plurality of transistors. Therefore, it is possible to implement the high-resolution display device with zero bezel by reducing the bezel area of the display device.