Overlapping Parity Sector Processing for Data Detection Latency

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Solution Overview

Problem

Existing data processing systems face inefficiencies in error correction, particularly in iterative data processing systems, where failed data tracks often require reprocessing during gaps in normal processing periods, leading to increased latency and reduced system utilization.

Innovation Solution

The implementation of overlapping parity sector processing, where soft information for failed tracks is collected and stored during normal processing, allowing for parallel reprocessing with new tracks, enabling reprocessing during normal operation without delaying subsequent tracks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If failed data tracks are reprocessed during gaps in normal processing periods, then error correction is performed, but system utilization decreases and latency increases

Engineering Contradiction:
Improveerror correctionVSAvoidsystem utilization
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system performs preliminary actions by collecting soft information for failed tracks during normal processing periods before reprocessing is needed. This allows the reprocessing to occur without waiting for gaps in the processing schedule, thereby maintaining high system utilization while still performing necessary error correction.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system maintains continuity of useful action by overlapping the reprocessing of failed tracks with the normal processing of new tracks. Instead of pausing normal operations to reprocess failed tracks, the system continues both operations simultaneously, ensuring continuous productive work and high system utilization.

Inventive Principle:
Principle #20Continuity of useful action

2Reliability

If failed data tracks are reprocessed during gaps in normal processing periods, then error correction is performed, but latency increases

Engineering Contradiction:
Improveerror correctionVSAvoidlatency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

Soft information for failed tracks is collected preliminarily during normal processing periods, so that when reprocessing is needed, the system can proceed immediately without waiting for gaps in the processing schedule. This eliminates delays and reduces latency while maintaining error correction capability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system eliminates idle time by maintaining continuous useful action through overlapping reprocessing with normal processing. Failed tracks are reprocessed during normal operation periods rather than waiting for gaps, thereby reducing latency and preventing loss of time.

Inventive Principle:
Principle #20Continuity of useful action

3Productivity

If overlapping parity sector processing is implemented, then system utilization increases and latency reduces, but processing complexity increases

Engineering Contradiction:
Improvesystem utilizationVSAvoidprocessing complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system segments the processing into distinct components: normal processing of new tracks and reprocessing of failed tracks. Each segment can be managed independently with its own resource allocation, making the overall complex system more manageable while still achieving high utilization through coordinated operation of segments.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system uses soft information as an intermediary that is collected during normal processing and used during reprocessing. This intermediary data structure allows the system to coordinate overlapping operations without requiring complex real-time synchronization, thereby managing processing complexity while maintaining high system utilization.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS9785504B2Systems and methods for overlapping parity sectors
Publication Date: 2017.10.10 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US9785504B2 patent drawing
  • US9785504B2 patent drawing
  • US9785504B2 patent drawing

AI summary

An apparatus for processing data includes a data detector configured to detect data values in data sectors to yield detected data, a data decoder configured to decode the detected data, wherein the data detector and the data decoder are configured to process the data sectors in a series of global iterations, a memory configured to store parity sector soft information, and a scheduler configured to control overlapping reprocessing of a failed sector in the data detector and the data decoder based on the parity sector soft information with processing of another data sector in the data detector and the data decoder.