Overlapping Pixel Capacitors for High-Resolution Display Stability
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Solution Overview
Problem
Existing display devices face challenges in increasing resolution and reducing pixel area while preventing leakage current and display defects such as luminance and color coordinate changes.
Innovation Solution
The proposed display device incorporates a pixel structure with overlapping capacitors and a specific arrangement of transistors and conductive layers on a substrate, including a semiconductor active pattern, insulating layers, and conductive layers to form capacitors that reduce pixel area and prevent leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the pixel structure is simplified to reduce manufacturing complexity, then the ease of manufacture is improved, but the resolution and pixel area reduction capabilities deteriorate
Solution Approach 1:
The patent implements overlapping capacitors in the vertical dimension (stacked configuration) rather than placing them side-by-side in the planar dimension. The first capacitor is formed between the first conductive layer and second conductive layer, while the second capacitor is formed between the third conductive layer and fourth conductive layer, utilizing the vertical stacking to achieve high integration without increasing planar area, thus maintaining high resolution while simplifying the overall pixel structure.
Solution Approach 2:
The conductive layers serve multiple functions: the first and second conductive layers form both the first capacitor and are connected to transistor terminals, while the third and fourth conductive layers form the second capacitor and are also connected to transistor terminals. This multi-functionality reduces the total number of separate components needed, simplifying manufacturing while achieving high resolution through compact pixel area.
2Area of stationary object
If overlapping capacitors are implemented to reduce pixel area, then the area of the pixel is reduced, but the device complexity increases
Solution Approach 1:
The patent utilizes vertical stacking of conductive layers to form overlapping capacitors, transitioning from a planar layout to a three-dimensional stacked configuration. This allows two capacitors to be integrated within the same pixel area by utilizing the vertical dimension, significantly reducing the pixel area while the systematic layering approach keeps the manufacturing process relatively simple.
Solution Approach 2:
The pixel structure is segmented into distinct functional layers: the first capacitor is formed by the first and second conductive layers, while the second capacitor is formed by the third and fourth conductive layers. This segmentation allows each capacitor to be independently formed and connected to specific transistor terminals, managing device complexity through modular design while achieving compact pixel area.
3Manufacturing precision
If more conductive layers are added to form overlapping capacitors, then the resolution is improved, but the manufacturing complexity increases
Solution Approach 1:
Each conductive layer is designed to serve multiple purposes: the first conductive layer acts as one electrode of the first capacitor and is connected to transistor terminals; the second conductive layer acts as the other electrode of the first capacitor and is also connected to transistor terminals; similarly for the third and fourth conductive layers forming the second capacitor. This multi-functionality reduces the need for additional separate components, allowing high resolution to be achieved without proportionally increasing manufacturing complexity.
Solution Approach 2:
The patent achieves high resolution by utilizing the vertical dimension through stacked conductive layers. Instead of adding more lateral elements that would increase planar complexity, the invention stacks capacitors vertically, allowing multiple capacitors to coexist in a compact volume. This dimensional transition enables high resolution display with manageable manufacturing complexity through systematic layer formation.
Data Source
AI summary
A display device includes a substrate; an active pattern disposed on the substrate; a first insulating layer; a first conductive layer disposed on the first insulating layer and having a driving gate electrode; a second insulating layer; a second conductive layer disposed on the second insulating layer and having a first storage electrode; a third insulating layer; a third conductive layer disposed on the third insulating layer and having a second storage electrode; and a light-emitting element disposed on the third conductive layer, wherein the second storage electrode overlaps the first storage electrode via the third insulating layer to form a first capacitor, the first storage electrode overlaps the driving gate electrode via the second insulating layer to form a second capacitor, and the driving gate electrode, the first storage electrode, and the second storage electrode at least partially overlap each other.