Overlapping Power Module Layout for Compact Carrier Cooling

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Solution Overview

Problem

Existing power devices face challenges in achieving a compact design with good thermal properties and reduced space consumption, particularly in applications like the automotive sector where available space is limited.

Innovation Solution

The power semiconductor modules are arranged in an overlapping configuration on the top and bottom sides of a carrier, allowing for a reduction in carrier length by up to 50% while maintaining efficient cooling through non-overlapping or partially overlapping openings for cooling elements, which project into the carrier's cavities.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If power semiconductor modules are arranged in a row on one side of the carrier, then installation and electric connection are comparably easy, but the carrier length becomes comparably long exceeding size limits

Engineering Contradiction:
Improveinstallation and electric connection easeVSAvoidcarrier length
Core Design Contradiction:
Ease of operationVSLength of stationary object

Solution Approach 1:

The patent transitions from a one-dimensional linear arrangement of power semiconductor modules to a two-dimensional overlapping configuration. Modules are arranged on both the top and bottom sides of the carrier in an overlapping pattern, effectively utilizing the third dimension (depth/height of carrier) to reduce the overall length while maintaining connectivity and cooling functionality

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Length of stationary object

If power semiconductor modules are arranged in an overlapping configuration on top and bottom sides, then carrier length is reduced by up to 50%, but thermal management becomes more challenging

Engineering Contradiction:
Improvecarrier lengthVSAvoidthermal management difficulty
Core Design Contradiction:
Length of stationary objectVSTemperature

Solution Approach 1:

The carrier is segmented into multiple cavities (first cavity, second cavity, third cavity) that are fluidically coupled to form cooling channels. These segmented cooling paths allow efficient heat dissipation from multiple power semiconductor modules simultaneously, addressing the thermal management challenge created by the compact overlapping arrangement

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Cooling channels are nested within the carrier structure, with cavities positioned to receive cooling elements from power semiconductor modules. The cooling channels are fluidically coupled to create a nested cooling system that efficiently manages heat from overlapping modules without increasing carrier length

Inventive Principle:
Principle #7Nested doll (Nesting)

3Temperature

If cooling elements project through openings into carrier cavities, then cooling efficiency is improved, but openings may overlap reducing effectiveness

Engineering Contradiction:
Improvecooling efficiencyVSAvoidopening arrangement complexity
Core Design Contradiction:
TemperatureVSDevice complexity

Solution Approach 1:

The patent assigns different opening configurations to different regions of the carrier. First openings are provided at a first side, second openings at a second side, and third openings at a third side. This local differentiation ensures that cooling elements from overlapping power semiconductor modules project into non-overlapping cavities, optimizing cooling efficiency while managing structural complexity

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enables a more compact design with improved thermal management and cooling efficiency, reducing the overall length of the carrier and optimizing space utilization.

Implementation Method 1

The power semiconductor modules are mounted on the carrier and are thermally connected to the carrier

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentEP4272251B1Power device and method for assembling a power device
Publication Date: 2025.08.20 HITACHI ENERGY LTD
  • EP4272251B1 patent drawingFigure 1~2
  • EP4272251B1 patent drawingFigure 3~4
  • EP4272251B1 patent drawingFigure 5~6

AI summary

According to an embodiment, the power device (100) comprises at least two power semiconductor modules (1) and a carrier (2) having a top side (20) and an opposite bottom side (21). The power semiconductor modules are mounted on the carrier and are thermally connected to the carrier. At least two power semiconductor modules are arranged in an overlapping configuration such that at least one power semiconductor module being mounted on the top side and at least one power semiconductor module being mounted on the bottom side at least partially overlap with each other when seen in plan view of the top side.