Overlapping Register Pairs on Memory Module Surfaces
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Solution Overview
Problem
Conventional memory modules face challenges in minimizing register area and maintaining signal integrity due to increased pin count and wiring complexity, which limits the number of memory chips that can be mounted and affects signal integrity.
Innovation Solution
The memory module architecture includes overlapping pairs of 1:2 registers on the front and back surfaces, arranged to buffer data to semiconductor banks in a daisy chain configuration, reducing mounting and wiring area while preserving signal integrity by avoiding signal divergence.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a higher number of registers is used to support more memory chips, then the memory module capacity is improved, but the mounting area required increases
Solution Approach 1:
The patent utilizes both front and back surfaces of the memory module for register mounting, effectively adding a spatial dimension (z-axis/surface orientation) to the layout. Registers are positioned on opposite surfaces with overlapping projections, allowing the module to support more memory chips without increasing the footprint area.
2Quantity of substance
If a higher number of registers is used, then more memory chips can be supported, but the signal integrity deteriorates due to increased controller load
Solution Approach 1:
The patent divides the memory module into multiple ranks, with each rank having its own dedicated register. This segmentation isolates the signal paths, allowing the memory controller to manage each rank independently and reducing the overall controller load, thereby maintaining signal integrity while supporting more memory chips.
3Area of stationary object
If 1:2 registers are used instead of 1:1 registers, then mounting space is reduced, but the number of pins increases
Solution Approach 1:
The patent combines multiple 1:1 register functions into single 1:2 registers positioned on front and back surfaces. Each 1:2 register handles signals for two memory banks, reducing the total number of register components and mounting space required, while the pin increase is offset by the reduced component count and optimized signal routing.
4Area of stationary object
If registers are positioned to overlap between front and back surfaces, then mounting area is minimized, but wiring complexity increases
Solution Approach 1:
The patent employs asymmetric positioning of overlapping registers, where the register on the front surface is offset relative to the register on the back surface. This asymmetric arrangement optimizes signal path lengths and reduces wiring complexity by avoiding direct alignment that would require complex through-hole connections, while still achieving area minimization through overlapping projections.
Data Source
AI summary
Pairs of registers with reduced pins are disposed to overlap on front and back surfaces of a memory module. An input signal INS is transferred through the registers in series in a daisy chain fashion to avoid divergence of the input signal INS for preserved signal integrity. Each register buffers the input signal INS to memory banks disposed closely to sides of the register for reduced wiring area.