Overlapping Row Selection for Stable Display Drive Currents
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Solution Overview
Problem
In current display technologies, particularly those using active matrix drive mode with current-controlled light emitting elements, there is a challenge in ensuring stable light emission characteristics over time, especially at low luminance gradations, due to irregularities in transistor operation characteristics, leading to insufficient write states and degraded image quality.
Innovation Solution
A display drive apparatus comprising a selection circuit, gradation signal generation circuit, and current write circuit that sets display pixels in overlapping selected states and supplies gradation currents based on display data, using field effect thin film transistors with amorphous or polysilicon semiconductor layers to manage luminance gradations effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If display pixels are driven using conventional sequential scanning methods, then the display can operate with standard driver circuits, but insufficient write states occur at low luminance gradations leading to degraded image quality
Solution Approach 1:
The patent applies preliminary action by setting multiple display pixels in a selected state before supplying gradation currents. Specifically, the selection circuit sets display pixels in overlapping time periods so that when gradation currents are supplied, the pixels are already in the appropriate selected state, ensuring complete write operation and preventing insufficient write states even at low luminance gradations.
Solution Approach 2:
The patent implements dynamics by using overlapping selection periods where the selection circuit dynamically adjusts the timing of setting display pixels in different rows. This dynamic timing arrangement ensures that pixels are selected in an optimized sequence that allows complete current writing before the next row is selected, thereby maintaining reliability across all luminance levels.
2Measurement precision
If the number of display pixels per data line is increased to improve definition, then display resolution improves, but the time required to write gradation currents increases
Solution Approach 1:
The patent applies segmentation by dividing the display panel into multiple row groups that can be selected in parallel. Instead of sequentially writing to all pixels in a single row before moving to the next row, the selection circuit segments the selection process across multiple rows with overlapping time periods. This allows the data line to serve multiple row groups simultaneously, reducing the total write time while maintaining high definition.
Solution Approach 2:
The patent implements dimensionality change by transitioning from a single-row sequential selection approach to a multi-row parallel selection approach. The selection circuit operates in a time-overlapped manner across multiple rows, effectively adding a temporal dimension to the selection process. This allows the system to service more pixels simultaneously without increasing the data line bandwidth requirements, thus reducing write time while maintaining resolution.
3Device complexity
If conventional single-row selection is used, then driver circuit complexity is reduced, but image quality degrades due to insufficient write states
Solution Approach 1:
The patent applies merging by combining multiple selection operations into a unified overlapping selection process. The selection circuit merges the selection of multiple rows into a coordinated operation where rows are selected in overlapping time periods. This merging approach allows the driver circuit to maintain relatively simple architecture while achieving reliable current writing to all pixels, as the overlapping selection ensures complete write states without requiring complex sequential control for each individual row.
Data Source
AI summary
A display drive apparatus includes a selection circuit which sets display pixels in a plurality of specific rows of the display panel in a selected state with periods at least overlapping each other. A gradation signal generation circuit generates a gradation signal which controls a luminance gradation of each display pixel based on the display data and sequentially supplies the generated gradation signal in time series. A plurality of signal distribution circuits sequentially distribute the gradation signal supplied by the gradation signal generation circuit in accordance with the plurality of display pixels in each column at the timing of time-series supply. A plurality of current holding circuits individually hold the distributed gradation signal and simultaneously supply as the gradation current a current having a current value based on the held gradation signal to the display pixels in the plurality of specific rows.