Display ESD Circuit With Overlapping Transistors for Voltage Clamping

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Solution Overview

Problem

Static electricity introduced into display apparatuses can cause malfunction or damage to internal circuits, particularly affecting transistors.

Innovation Solution

An electrostatic discharge circuit is implemented with specific transistor configurations to manage voltage levels, ensuring protection against static electricity by turning on transistors based on voltage thresholds, thereby maintaining signal line voltage within defined gate power voltages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If transistors are used to control signal lines in display apparatuses, then the display can operate with low voltage and consume less power, but the internal circuits become vulnerable to damage from static electricity

Engineering Contradiction:
Improvepower consumptionVSAvoidcircuit protection against static electricity
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent introduces a dedicated electrostatic discharge circuit as an intermediary component between the signal line and ground. This circuit includes electrostatic discharge transistors that remain normally off but activate when static electricity exceeds a threshold voltage, safely channeling the excess charge to ground without affecting normal low-voltage operation. This mediator structure allows the display to maintain low power consumption while gaining protection against static electricity damage.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If electrostatic discharge protection circuits are added to protect against static electricity, then circuit reliability improves, but the device complexity increases

Engineering Contradiction:
Improvecircuit protection against static electricityVSAvoidcircuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the electrostatic discharge protection function with the existing transistor-based signal line structure. The electrostatic discharge transistors are integrated alongside the driving transistors sharing common signal lines and gate power voltage lines. By combining protection functions with existing circuit elements rather than adding completely separate protection circuits, the patent achieves reliable static electricity protection while minimizing increases in overall device complexity.

Inventive Principle:
Principle #5Merging (Combining)

3Manufacturing precision

If multiple transistors are disposed to overlap each other between signal lines and gate power voltage lines, then voltage control precision improves, but manufacturing difficulty increases

Engineering Contradiction:
Improvevoltage control precisionVSAvoidtransistor arrangement
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent utilizes vertical stacking and overlapping arrangement of transistors in the third dimension rather than only horizontal placement. Multiple transistors are disposed to overlap each other between the signal line and gate power voltage lines, creating a layered structure. This dimensional approach allows precise voltage control through multiple transistor stages while efficiently utilizing the available space, thereby reducing the impact on manufacturing processes compared to purely planar expansions.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS12536962B2Electrostatic discharge circuit and display apparatus including the same
Publication Date: 2026.01.27 LG DISPLAY CO LTD
  • US12536962B2 patent drawing
  • US12536962B2 patent drawing
  • US12536962B2 patent drawing

AI summary

An electrostatic discharge circuit and a display apparatus are discussed. The electrostatic discharge circuit can include a signal line configured to transmit a gate signal or a data signal, a first gate power voltage line, a second gate power voltage line, a first transistor and a second transistor disposed to overlap each other between the signal line and the second power voltage line, and a third transistor and a fourth transistor disposed to overlap each other between the signal line and the first power voltage line.