Overlapping Underfill Package Structure for Dense Die Stacking

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Solution Overview

Problem

The semiconductor industry faces challenges in achieving higher integration density and smaller packaging techniques for semiconductor devices, particularly in the context of Package-on-Package (PoP) technology, where efficient methods for forming redistribution structures and attaching core substrates to these structures are needed to enhance component density and functionality.

Innovation Solution

The method involves forming redistribution structures on a carrier substrate using conductive layers and dielectric materials, attaching core substrates with conductive connectors, and encapsulating the components with a molding compound, while also using underfills to provide structural support and environmental protection, allowing for the stacking of integrated circuit dies on a package substrate.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If Package-on-Package (PoP) technology is used to increase integration density, then component density and functionality are enhanced, but fabrication complexity increases

Engineering Contradiction:
Improvecomponent densityVSAvoidfabrication complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The method performs preliminary actions by forming redistribution structures and attaching core substrates in a specific sequence before final encapsulation. The underfill material is applied and cured between the core substrate and integrated circuit die, establishing structural integrity and electrical connections in advance, which simplifies subsequent fabrication steps while maintaining high component density

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The fabrication process is segmented into distinct stages: forming redistribution structures on the package substrate, attaching core substrates with conductive connectors, applying underfill material, placing integrated circuit dies, and final encapsulation. This segmentation allows each step to be optimized independently, reducing overall fabrication complexity while achieving high integration density through the PoP architecture

Inventive Principle:
Principle #1Segmentation

2Area of moving object

If smaller packaging techniques are used to reduce device size, then footprint on PCB is reduced, but structural integrity becomes more difficult to maintain

Engineering Contradiction:
Improvepackage footprintVSAvoidstructural integrity
Core Design Contradiction:
Area of moving objectVSStrength

Solution Approach 1:

The patent employs composite material structures by combining the package substrate, core substrates, underfill material, and integrated circuit dies into a unified PoP assembly. The underfill material acts as a composite element that provides both mechanical support and environmental protection, enabling the compact structure to maintain structural integrity despite the reduced footprint

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The PoP architecture implements a nested doll structure where core substrates are attached to the package substrate, and integrated circuit dies are stacked on top of the core substrates. This vertical nesting reduces the horizontal footprint while maintaining structural integrity through the hierarchical arrangement and interconnecting conductive structures

Inventive Principle:
Principle #7Nested doll (Nesting)

3Adaptability or versatility

If multiple layers of redistribution structures are formed to enhance functionality, then device capabilities are improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improvedevice functionalityVSAvoidredistribution structure precision
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent transitions from planar redistribution structures to three-dimensional vertical stacking by forming multiple layers of redistribution structures at different heights and positions. This dimensional change allows enhanced device functionality through increased interconnect density while managing manufacturing precision requirements through the PoP architecture's inherent alignment features and underfill support

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS11837586B2Package structure and method of forming thereof
Publication Date: 2023.12.05 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11837586B2 patent drawing
  • US11837586B2 patent drawing
  • US11837586B2 patent drawing

AI summary

A package structure includes a package substrate, a first die, a second die, a first underfill, and a second underfill. The first die and a second die are disposed on the package substrate. The first underfill is between the first die and the package substrate, and the first underfill includes a first extension portion extending from a first sidewall of the first die toward the second die. The second underfill is between the second die and the package substrate, and the second underfill includes a second extension portion extending from a second sidewall of the second die toward the first die, the second extension portion overlapping the first extension portion on the package substrate.