Overlapping Vertical Transitions for Crosstalk Reduction
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Solution Overview
Problem
High-speed signaling in integrated circuits (ICs) faces challenges with signal loss and crosstalk between ICs and off-chip terminals, particularly due to inductive dominant vertical transitions and horizontal microstrip routing, which limits bandwidth and requires increased pin count and layer count to mitigate crosstalk.
Innovation Solution
The implementation of overlapping vertical transitions with increased mutual capacitance relative to self-capacitance to tune capacitive coupling, reducing far-end crosstalk (FEXT) and enabling higher I/O density or layer count reduction by changing the polarity of channel components, thereby canceling inductive dominant FEXT and allowing for more efficient high-speed signaling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If conventional I/O channel architectures employ conservative signal to ground (S:G) ratios in vertical transitions and/or stripline architectures in horizontal routing to mitigate crosstalk, then crosstalk is reduced, but pin count and layer count increase
Solution Approach 1:
The patent changes the electrical parameters of vertical transitions by increasing mutual capacitance between adjacent transitions. This is achieved by adjusting the geometry and positioning of conductive elements to enhance capacitive coupling, thereby reducing FEXT without requiring conservative S:G ratios or stripline architectures that would increase pin and layer counts
Solution Approach 2:
The patent converts the harmful inductive dominant FEXT into a beneficial effect by introducing capacitive coupling between adjacent vertical transitions. The capacitive coupling creates a counteracting effect that cancels the inductive dominant crosstalk, transforming the problematic inductive coupling into a useful capacitive coupling mechanism
2Speed
If inductive dominant vertical transitions and horizontal microstrip routing are used for high-speed signaling, then bandwidth is achieved, but far-end crosstalk (FEXT) increases and becomes the bandwidth limiter
Solution Approach 1:
The patent converts the harmful inductive dominant FEXT into a beneficial effect by introducing capacitive coupling between adjacent vertical transitions. The capacitive coupling creates a counteracting effect that cancels the inductive dominant crosstalk, transforming the problematic inductive coupling into a useful capacitive coupling mechanism that enables higher bandwidth
Solution Approach 2:
The patent changes the electrical parameters of vertical transitions by increasing mutual capacitance between adjacent transitions. This is achieved by adjusting the geometry and positioning of conductive elements to enhance capacitive coupling, thereby reducing FEXT and enabling higher data bandwidth applications
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces crosstalk, enabling higher I/O density, lower layer counts, and increased channel data rates or voltage/time margins, while maintaining acceptable I/O performance without increasing pin count or layer count.
Implementation Method 1
overlapping vertical transitions with increased mutual capacitance relative to self-capacitance to tune capacitive coupling
Implementation Method 2
Crosstalk between channels occurs when a signal transmitted on one channel of a transmission system creates an undesired effect in another channel and may be caused by one or more of capacitive, inductive, or conductive coupling between the channels
Data Source
AI summary
Capacitively coupled vertical transitions are configured with a desired amount of mutual capacitance to at least partially cancel crosstalk for an overall channel crosstalk (e.g., FEXT) reduction. In embodiments, capacitive coupling of adjacent vertical transitions is achieved with overlapping metal surfaces within the vertical transitions. In embodiments, one or more of the overlapping metal surfaces are vias, via pads, or metal stub features extending off a vertical transition. In embodiments, signal paths with overlapped vertical transitions are utilized to achieve crosstalk reduction of more than one victim-aggressor pair and/or to achieve crosstalk reduction of more than two aggressors. In embodiments, capacitively coupled vertical transitions are implemented in a package substrate, an interposer, or a printed circuit board.


