Display Panel Overlapping Voltage Lines for High-Resolution Pixels
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Solution Overview
Problem
The challenge of arranging electronic elements of various configurations in a narrow area to manufacture high-resolution display devices has increased with the diversification of display device uses.
Innovation Solution
A display panel design with specific configurations including first and second pixel circuits, horizontal and vertical voltage lines, and transistors, where the horizontal voltage lines are at different layers and overlap, and a bottom metal layer connects these elements, enhancing electrical connections and reducing space requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If electronic elements are arranged in a narrow area to achieve high resolution, then display resolution is improved, but device complexity increases
Solution Approach 1:
The patent applies multi-layer stacking to arrange voltage lines and pixel circuits in different vertical layers rather than spreading them horizontally. This dimensional transition from 2D planar layout to 3D stacked architecture enables high-resolution pixel arrangement while managing wiring complexity through vertical integration, directly resolving the contradiction between display resolution and device complexity
Solution Approach 2:
The bottom metal layer serves multiple functions simultaneously: it acts as a common electrode for the display, provides grounding references, and serves as a structural support layer. This multi-functionality reduces the need for separate dedicated layers, thereby reducing overall device complexity while maintaining high-resolution display capabilities
2Ease of manufacture
If multiple voltage lines are arranged in the same layer, then manufacturing is simplified, but available space is reduced
Solution Approach 1:
The patent distributes voltage lines across multiple vertical layers (first voltage line in first layer, second voltage line in second layer) rather than confining them to a single planar layer. This vertical separation increases the effective available space in each layer, allowing sufficient routing area for high-resolution displays while maintaining manufacturing simplicity through standardized multi-layer fabrication processes
3Area of stationary object
If voltage lines are placed at different layers, then space utilization is improved, but manufacturing complexity increases
Solution Approach 1:
The patent implements a multi-layer stacked architecture where voltage lines are positioned in different vertical layers, effectively utilizing three-dimensional space. This approach maximizes space utilization for high-resolution pixel arrangements while employing standard semiconductor fabrication techniques for multi-layer construction, thereby managing manufacturing complexity through established industrial processes
Data Source
AI summary
A display panel includes: first and second pixel circuits adjacent to each other in a first direction; a first light-emitting diode (LED) electrically connected to the first pixel circuit; a second LED electrically connected to the second pixel circuit; a first horizontal voltage line extending in the first direction, and electrically connected to a semiconductor layer of a first transistor; a second horizontal voltage line extending in the first direction, and electrically connected to a semiconductor layer of a second transistor; and a first gate line extending in the first direction, and electrically connected to each of a gate electrode of the first transistor of the first pixel circuit and a gate electrode of the second transistor of the second pixel circuit. The first horizontal voltage line and the second horizontal voltage line are at different layers from each other, and overlap with each other in a plan view.