Overlapping Wiring Traces for Semiconductor Packaging Density
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional semiconductor devices face challenges in increasing packaging density due to the limitations of metal leads in providing conduction paths, which restricts the processing of multiple control signals effectively.
Innovation Solution
A semiconductor device design featuring a conductive part with overlapping wiring traces on a substrate surface, providing thinner and shorter conduction paths that overlap with electronic components, allowing for higher packaging density and design flexibility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If metal leads are used to form conduction paths, then electrical connectivity is achieved, but packaging density is reduced
Solution Approach 1:
The patent transitions from planar conduction paths (metal leads on the same plane) to three-dimensional overlapping wiring traces that extend in the thickness direction. This dimensional change allows conduction paths to overlap with electronic components without increasing the footprint area, thereby improving packaging density while maintaining electrical connectivity.
Solution Approach 2:
The overlapping wiring traces are positioned to nest within the vertical space occupied by electronic components. The conduction paths are routed through the thickness direction, effectively nesting the wiring within the component stack-up, which reduces the horizontal area required for interconnections.
2Reliability
If conduction paths are routed around electronic components, then electrical connectivity is achieved, but conduction path length increases
Solution Approach 1:
Instead of routing conduction paths laterally around electronic components (increasing path length), the patent utilizes the thickness direction to create overlapping wiring traces. This vertical routing approach shortcuts the conduction path by going over or under components rather than circumventing them horizontally.
3Productivity
If the number of conduction paths is increased to process more control signals, then signal processing capability is improved, but device complexity increases
Solution Approach 1:
The patent merges multiple conduction paths into overlapping wiring traces that share the same vertical space. Multiple traces can overlap in the thickness direction, effectively combining the spatial footprint of multiple paths into a compact three-dimensional arrangement, reducing overall device complexity while maintaining high signal processing capability.
Data Source
AI summary
A semiconductor device includes a substrate, a conductive part, a controller module and a sealing resin. The substrate has a substrate obverse surface and a substrate reverse surface facing away from each other in a z direction. The conductive part is made of an electrically conductive material on the substrate obverse surface. The controller module is disposed on the substrate obverse surface and electrically connected to the conductive part. The sealing resin covers the controller module and at least a portion of the substrate. The conductive part includes an overlapping wiring trace having an overlapping portion overlapping with the electronic component as viewed in the z direction. The overlapping portion of the overlapping wiring trace is not electrically bonded to the controller module.