Overlay Correction Model for Semiconductor Wafer Alignment

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Solution Overview

Problem

Current semiconductor wafer processing techniques face challenges with increasing overlay errors due to non-uniform stress and deformation, leading to misalignment of patterns across layers, which are costly to correct and time-consuming to measure, especially with traditional overlay measurement methods that require extensive data collection.

Innovation Solution

A method for calculating an overlay correction model using a subset of overlay marks, where wafer fine model parameters and field fine parameters are determined based on measured deviations, allowing for interpolation to estimate process correction parameters across the wafer surface, reducing the need for extensive measurements and improving precision by weighting marks based on distance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If complete overlay measurements are performed on all semiconductor wafers at multiple positions, then measurement precision is improved, but productivity deteriorates due to slow measurement speed

Engineering Contradiction:
Improveoverlay measurement precisionVSAvoidtool capacity
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent segments the overlay measurement process by dividing the wafer surface into multiple exposure fields and further into zones within each field. Instead of measuring all positions uniformly, the method selectively measures only certain zones (e.g., edge zones or specific regions) while using interpolation for other areas. This segmentation reduces the total number of measurement points while maintaining adequate measurement precision for process correction.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by assigning different measurement priorities to different regions of the wafer. Certain zones (such as edge zones or zones with higher stress deformation) are measured with higher precision or given more weight in the overlay model calculation, while other zones use interpolated values. This allows the system to focus measurement resources on critical areas, improving overall measurement effectiveness without requiring complete measurement of all positions.

Inventive Principle:
Principle #3Local quality

2Productivity

If multiple parallel overlay measurement units are deployed, then productivity is improved, but device complexity increases

Engineering Contradiction:
Improvemeasurement throughputVSAvoidsystem complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the measurement task temporally and spatially rather than deploying parallel hardware units. By dividing the wafer into zones and measuring only selected zones in sequence, the system achieves effective throughput improvement without adding parallel measurement devices. This maintains a single overlay measurement tool while still processing multiple wafers efficiently through intelligent sampling.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies partial action by measuring only a subset of available overlay marks rather than all marks on every wafer. By selecting specific zones and marks for measurement based on their importance to the overlay model, the system achieves sufficient measurement coverage for process correction without the full resource investment of complete measurements or parallel hardware systems.

Inventive Principle:
Principle #16Partial or excessive action

3Productivity

If overlay measurements are performed on a subset of wafers, then productivity is improved, but measurement precision deteriorates

Engineering Contradiction:
Improvemeasurement throughputVSAvoidoverlay measurement precision
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The patent applies local quality by strategically selecting which zones to measure based on their importance to the overall overlay model. Critical zones (such as wafer edges, zones with known stress patterns, or zones containing alignment marks) are measured with high precision, while less critical zones use interpolated values. This selective measurement approach maintains measurement precision where it matters most while improving productivity through reduced measurement scope.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent uses feedback from previously measured zones and from the overlay model itself to guide subsequent measurements. The system analyzes measurement results and identifies which additional zones need measurement to achieve the desired model accuracy. This feedback-driven approach ensures that measurements are performed only where necessary to maintain precision, avoiding redundant measurements that would reduce productivity.

Inventive Principle:
Principle #23Feedback

4Reliability

If traditional overlay measurement methods are used, then measurement completeness is improved, but loss of time increases

Engineering Contradiction:
Improvemeasurement completenessVSAvoidmeasurement time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent segments the measurement process into essential and optional components. By identifying and measuring only the critical zones needed for accurate overlay model calculation, the system eliminates time-consuming measurements of non-essential areas. The segmentation allows the system to achieve sufficient measurement completeness for process correction without the full time investment of traditional complete measurements.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies partial action by performing measurements on a carefully selected subset of overlay marks rather than all available marks. This partial measurement approach provides adequate information for calculating overlay correction parameters while significantly reducing measurement time compared to exhaustive measurement methods.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentEP2620976B1Overlay model for aligning and exposing semiconductor wafers
Publication Date: 2016.07.20 QONIAC
  • EP2620976B1 patent drawingFigure 1
  • EP2620976B1 patent drawingFigure 2a~2b
  • EP2620976B1 patent drawingFigure 3a~3b

AI summary

A method of calculating an overlay correction model in a unit for the fabrication of a wafer comprising a structural pattern on a substrate and having first overlay marks generated in a first layer and second overlay marks in a second layer. Overlay deviations of a subset of overlay marks are measured providing a subset of overlay model parameters. For a plurality of overlay positions the overlay deviations are estimated using the subset of overlay model parameters. A set of process correction parameters is provided for the plurality of overlay positions. The subset of overlay marks is selected in dependence of the distance to the position of one exposure field, and the selected overlay marks are weighted based on the distance to the overlay position of the exposure field.