Overlay Error Correction via Multi-Level Sub-Pattern Mark
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Solution Overview
Problem
The semiconductor industry faces challenges in accurately measuring overlay errors in photoresist patterns and underlying patterns due to asymmetric shapes of measurement structures, making it difficult to correct these errors effectively.
Innovation Solution
A semiconductor device structure and method that utilize an overlay mark with multiple sub-patterns at different horizontal levels, allowing for the generation of correction data from each sub-pattern to refine the overlay error correction, thereby improving the accuracy of overlay error measurement.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a single measurement structure is used for overlay error measurement, then the measurement process is simple, but the measurement precision is insufficient due to asymmetric shapes and fabrication process variations
Solution Approach 1:
The overlay mark is divided into multiple sub-patterns (first sub-patterns and second sub-patterns) with different profiles at different horizontal levels. Each sub-pattern provides independent measurement data that can be processed separately, allowing the system to compensate for asymmetric shapes and fabrication variations by analyzing multiple segmented components rather than relying on a single measurement structure.
Solution Approach 2:
The patent introduces a vertical dimension by creating sub-patterns at different horizontal levels (first horizontal level and second horizontal level). This multi-level structure allows measurement of overlay errors in three-dimensional space, providing additional measurement dimensions that improve precision by capturing errors at different depths and orientations, thereby compensating for the limitations of two-dimensional single-level measurements.
2Manufacturing precision
If correction data is generated from all sub-patterns, then the overlay error correction is comprehensive, but the processing time increases
Solution Approach 1:
Different sub-patterns are designed with different profiles tailored to specific measurement requirements. The system can select and process only the sub-patterns relevant to the specific overlay error being measured, rather than processing all sub-patterns uniformly. This localized approach allows comprehensive correction capability while reducing processing time by focusing computational resources on the most relevant measurement data.
Solution Approach 2:
The patent provides more sub-patterns than strictly necessary for basic measurement, allowing the system to use only the essential sub-patterns for quick measurements when time is critical, while having the full set available for high-precision corrections when needed. This partial action approach enables the system to adapt the processing scope to the specific requirements of each measurement task.
Data Source
AI summary
The present disclosure provides a method for overlay error correction. The method includes: obtaining an overlay error based on a lower-layer pattern and an upper-layer pattern of a wafer, wherein the lower-layer pattern is obtained by first fabrication equipment through which the wafer passes, and the upper-layer pattern is obtained by exposure equipment; generating a corrected overlay error based on the overlay error and fabrication processes performed on the wafer after the first fabrication equipment and prior to the exposure equipment; and adjusting the exposure equipment based on the corrected overlay error.