Semiconductor Overlay Key Patterning for Damage-Free Alignment
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Solution Overview
Problem
The increasing complexity of semiconductor fabrication processes and introduction of new materials have made overlay measurement more difficult, particularly due to damage to overlay keys, which are crucial for accurately aligning patterns in semiconductor devices.
Innovation Solution
A method involving the formation of lower and upper overlay key patterns with different pitches, followed by measuring the overlay using a Moire pattern, removing the upper key pattern, and using the remaining upper pattern as an etching mask to perform precise etching, ensuring the etch endpoint is below the lower pattern face to prevent damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If overlay key patterns are used for accurate overlay measurement, then measurement precision is improved, but the overlay keys are damaged due to complicated fabricating processes and new materials
Solution Approach 1:
The overlay key pattern is segmented into two separate layers: a lower overlay key pattern formed in the lower pattern layer and an upper overlay key pattern formed in the upper pattern layer. This segmentation allows each overlay key pattern to be protected within its respective layer, preventing damage while enabling accurate overlay measurement through the Moire effect when both patterns are present.
Solution Approach 2:
The lower overlay key pattern is formed in advance during the lower pattern fabrication process, and the upper overlay key pattern is formed during the upper pattern fabrication process. This preliminary formation ensures both overlay key patterns are established before the critical etching process, allowing overlay measurement to be performed without risking damage to pre-formed overlay keys.
2Ease of manufacture
If the upper overlay key pattern is removed after measurement, then the etching mask can be simplified, but the lower overlay key pattern becomes exposed and vulnerable to damage
Solution Approach 1:
The protection of the lower overlay key pattern is achieved by transitioning from a two-dimensional planar protection concept to a three-dimensional layered structure. The upper pattern layer physically covers and protects the lower overlay key pattern in the vertical dimension, allowing the upper overlay key pattern to be removed for etching mask simplification while the lower overlay key remains protected within the lower pattern layer structure.
3Manufacturing precision
If the etch endpoint is set below the lower pattern face, then precise etching is achieved, but there is risk of damaging the lower overlay key pattern
Solution Approach 1:
The lower overlay key pattern is formed preliminarily during the lower pattern fabrication process, establishing it as an integral part of the lower pattern layer. This preliminary formation ensures that when the etch endpoint is set below the lower pattern face for precise etching, the lower overlay key pattern is already protected within the lower pattern layer structure, preventing damage during the etching process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables accurate overlay measurement and precise etching, reducing the risk of damage to lower overlay keys and allowing for the formation of finely aligned semiconductor patterns without defects.
Implementation Method 1
measuring an overlay between the lower overlay key pattern and the upper overlay key pattern, removing the upper overlay key pattern... using a Moire pattern formed by the lower overlay key pattern and the upper overlay key pattern
Data Source
AI summary
A method for fabricating a semiconductor device using an overlay measurement and a semiconductor device fabricated by the method are provided. The method includes forming a lower pattern including a lower overlay key pattern having a first pitch, on a substrate, forming an upper pattern including an upper overlay key pattern having a second pitch different from the first pitch, on the lower pattern, measuring an overlay between the lower overlay key pattern and the upper overlay key pattern, removing the upper overlay key pattern, and after removing the upper overlay key pattern, performing an etching process using the upper pattern as an etching mask.