3D Memory Overlay Mark Formation for Reliable Alignment Measurement

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Solution Overview

Problem

Accurate measurement of misalignment between layers in the manufacturing of 3D semiconductor memory devices is difficult due to the complexity of the process, limiting the integration density and reliability of overlay marks.

Innovation Solution

A method for forming an overlay mark involving a substrate with a lower overlay, a pattern layer, and an upper overlay with different light transmittance areas, allowing for precise measurement of misalignment through controlled light emission and trench formation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional overlay marks are used in 3D semiconductor memory device manufacturing, then the number of process steps is increased, but the measurement precision of misalignment data from lower overlay marks deteriorates

Engineering Contradiction:
Improvenumber of process stepsVSAvoidmisalignment data measurement precision
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

The overlay mark is divided into multiple regions with different light transmittance characteristics. The first region has higher light transmittance while the second region has lower light transmittance, allowing selective light transmission to preserve measurement precision despite increased process steps

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the overlay mark are assigned different material properties (light transmittance). This local differentiation enables the overlay mark to simultaneously serve multiple functions: maintaining alignment reference capability while accommodating additional processing steps

Inventive Principle:
Principle #3Local quality

2Device complexity

If conventional overlay marks are used with increased process steps, then manufacturing complexity increases, but the reliability of overlay measurement deteriorates

Engineering Contradiction:
Improvemanufacturing process complexityVSAvoidoverlay measurement reliability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The overlay mark structure is pre-configured with regions of different light transmittance before the measurement process. This preliminary structural preparation ensures that even with increased manufacturing complexity, the measurement reliability is maintained by having the light transmission characteristics already in place

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The material layer with different light transmittance regions acts as an intermediary between the upper overlay and the detection system. This intermediary structure protects the measurement reliability by controlling light transmission while accommodating the complexity of additional manufacturing steps

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enhances the reliability of overlay measurement by adjusting light transmittance and forming trenches, ensuring accurate inspection of layer alignment and maintaining scribe lane integrity.

Implementation Method 1

forming a material layer on the upper overlay, wherein the material layer includes a third area corresponding to the first area and a fourth area corresponding to the second area; emitting light to the upper overlay through the material layer

Methodology Applied
Scientific EffectLight transmittance: Absorption (EM radiation)

Data Source

PatentUS20250258440A1Method for forming overlay mark and overlay measurement method using the overlay mark
Publication Date: 2025.08.14 SAMSUNG ELECTRONICS CO LTD
  • US20250258440A1 patent drawing
  • US20250258440A1 patent drawing
  • US20250258440A1 patent drawing

AI summary

Disclosed are a method for forming an overlay mark with improved reliability and an overlay measurement method using the overlay mark. The method for forming the overlay mark includes forming a lower overlay in a substrate; forming a pattern layer on the substrate; forming an upper overlay on the pattern layer, wherein the upper overlay includes a first area and a second area; forming a material layer on the upper overlay, wherein the material layer includes a third area corresponding to the first area and a fourth area corresponding to the second area; emitting light to the upper overlay through the material layer; and removing a portion of the upper overlay using the light.