Overlay Metrology Feedback for Layer-by-Layer Lithography Alignment

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

As semiconductor node size decreases, process overlay errors become more significant, leading to variations in feature sizes and poor control over on-product overlay, which existing technologies struggle to effectively address.

Innovation Solution

The implementation of a process control method using metrology targets with periodic structures at both previous and current layers, where measurements are derived from the previous layer before producing the current layer, and used to adjust lithography stages, integrating lithography and metrology tools into a feedback loop for layer-by-layer adjustments.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of moving object

If node size in semiconductor manufacturing decreases, then device scaling is achieved, but process overlay errors become more significant and manufacturing precision deteriorates

Engineering Contradiction:
Improvenode sizeVSAvoidprocess overlay error
Core Design Contradiction:
Length of moving objectVSManufacturing precision

Solution Approach 1:

The patent performs metrology measurements on the previous layer before producing the current layer, and uses these measurements to adjust lithography stages in advance. This preliminary action allows overlay errors to be corrected before they affect subsequent layers, addressing the worsening manufacturing precision at smaller node sizes

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent integrates lithography and metrology tools into a feedback loop where measurements from the previous layer are used to adjust lithography parameters for the current layer. This real-time feedback mechanism compensates for overlay errors that become more significant as node size decreases

Inventive Principle:
Principle #23Feedback

2Ease of manufacture

If traditional separate measurement and adjustment methods are used, then process simplicity is maintained, but overlay control precision is insufficient

Engineering Contradiction:
Improveprocess simplicityVSAvoidoverlay control
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent merges lithography and metrology tools into an integrated system where measurement and adjustment operations are combined. This integration enables precise overlay control by directly using measurement data to adjust lithography stages, overcoming the limitations of separate traditional methods while maintaining process efficiency

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11971664B2Reducing device overlay errors
Publication Date: 2024.04.30 KLA CORP
  • US11971664B2 patent drawing
  • US11971664B2 patent drawing
  • US11971664B2 patent drawing

AI summary

Process control methods, metrology targets and production systems are provided for reducing or eliminating process overlay errors. Metrology targets have pair(s) of periodic structures with different segmentations, e.g., no segmentation in one periodic structure and device-like segmentation in the other periodic structure of the pair. Process control methods derive metrology measurements from the periodic structures at the previous layer directly following the production thereof, and prior to production of the periodic structures at the current layer, and use the derived measurements to adjust lithography stage(s) that is part of production of the current layer. Production system integrate lithography tool(s) and metrology tool(s) into a production feedback loop that enables layer-by-layer process adjustments.