Semiconductor Overlay Measurement Using Product Number Alignment Marks
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Solution Overview
Problem
The existing semiconductor manufacturing process is prolonged by the repetitive steps of forming alignment marks, finding alignment marks, and overlaying them, which is particularly problematic in advanced process nodes where high overlay accuracy is required, leading to increased process time and complexity.
Innovation Solution
Utilizing the product number patterns on the wafer surface as alignment marks, extracting and storing them in a data pool, and generating simulated alignment marks to directly use these patterns for overlay, thereby omitting the formation of traditional alignment marks and reducing the time spent on finding alignment marks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional alignment marks are formed and used for overlay measurement, then overlay accuracy can be ensured, but the manufacturing process time is prolonged due to repetitive steps of forming, finding, and overlaying alignment marks
Solution Approach 1:
The product number pattern serves dual purposes: it identifies the wafer/product information and simultaneously functions as the alignment mark for overlay measurement. This eliminates the need for separate alignment mark structures, reducing process steps while maintaining measurement capability
Solution Approach 2:
The invention merges the alignment mark function with the existing product number pattern. By combining these two previously separate elements into one, the process eliminates redundant steps of forming and locating separate alignment marks, thereby reducing overall process time while maintaining overlay measurement capability
2Manufacturing precision
If traditional alignment marks are formed for each material layer, then accurate overlay can be achieved, but the process complexity increases due to repeated formation and identification steps
Solution Approach 1:
The product number pattern performs multiple functions: it serves as both the product identifier and the alignment reference mark. This multi-functionality eliminates the need for separate alignment mark formation steps for each layer, reducing process complexity while maintaining measurement accuracy
Solution Approach 2:
The product number pattern is formed in advance during the lithography process, before the overlay measurement is needed. This preliminary formation of the dual-purpose pattern eliminates the need for separate alignment mark creation steps, simplifying the overall process
Data Source
AI summary
The invention provides a semiconductor overlay measurement method, which comprises the following steps: providing a wafer, wherein the wafer comprises a plurality of regions arranged in an array, wherein each region contains a product number pattern, and providing a system, wherein the system comprises a data pool, a plurality of English letter patterns and numeral patterns are stored in the data pool, and finding out English letter patterns and/or the numeral patterns conforming to the product number patterns from the data pool, and splicing some English letter patterns and/or some numeral patterns into an alignment mark pattern, inputting the alignment mark pattern into the system, and performing a first overlay step on the alignment mark pattern and each product number pattern on the wafer.