Overlay Target Layout for CMP-Induced Metrology Error Reduction
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Solution Overview
Problem
Existing overlay target designs are compromised by process-induced defects such as dishing and erosion from fabrication processes like CMP, leading to reduced metrology accuracy.
Innovation Solution
A system and method to design overlay targets by predicting process-induced defects and selecting candidate variations that minimize aggregate overlay errors through controlled phase and amplitude asymmetries, using a controller to determine and fabricate the final design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If overlay targets include large unpatterned areas for CMP processing, then manufacturing process compatibility is improved, but dishing and erosion effects increase causing reduced measurement precision
Solution Approach 1:
The patent applies asymmetry by intentionally designing the overlay target with controlled asymmetric features that compensate for the symmetric dishing and erosion effects caused by CMP processing. The asymmetric target geometry allows the metrology system to distinguish between intentional design asymmetries and process-induced asymmetries, thereby maintaining measurement precision despite CMP-induced dishing and erosion in large unpatterned areas.
2Ease of operation
If overlay targets are designed with conventional methods, then alignment functionality is achieved, but process-induced defects are not predicted leading to reduced reliability
Solution Approach 1:
The patent implements preliminary action by using simulation and prediction models during the design phase to forecast process-induced defects before actual fabrication occurs. This allows designers to identify and mitigate potential dishing, erosion, and other CMP-related defects in advance, selecting target designs that are more robust to anticipated process variations, thereby improving reliability while maintaining alignment functionality.
3Ease of manufacture
If large unpatterned areas are used in overlay targets, then CMP process access is improved, but erosion effects increase causing loss of information
Solution Approach 1:
The patent applies parameter changes by optimizing the geometric parameters of the overlay target features (such as feature size, spacing, and pattern density) to balance CMP process accessibility with information preservation. By carefully controlling these parameters, the design allows sufficient unpatterned area for CMP tool access while maintaining enough patterned features to preserve target quality and prevent excessive erosion-induced information loss.
Data Source
AI summary
A metrology system may receive a plurality of candidate design variations of a target layout of an overlay target. A metrology system may determine one or more process-induced target defects for the plurality of candidate design variations when fabricated with a known fabrication process. A metrology system may determine one or more process-induced overlay errors associated with the one or more process-induced target defects for the plurality of candidate design variations when measured with a known metrology recipe. A metrology system may select a final design variation from the plurality of candidate design variations that provides a smallest aggregate overlay error based on the one or more process-induced overlay errors.